![](https://csdnimg.cn/release/download_crawler_static/11959256/bg9.jpg)
6.4.1 Instruction Cycle ......................................................................................................................... 29
6.4.2 Multi-slave Operation .................................................................................................................. 30
7 Power Control and Regulation .......................................................................................................................... 31
7.1 Switch-mode Regulator ............................................................................................................................ 31
7.2 Low-voltage VDD_CORE Linear Regulator ............................................................................................. 31
7.3 Reset ........................................................................................................................................................ 31
7.3.1 Digital Pin States on Reset ......................................................................................................... 31
7.3.2 Power-on Reset .......................................................................................................................... 32
8 Example Application Schematic ........................................................................................................................ 33
9 Electrical Characteristics ................................................................................................................................... 34
9.1 Absolute Maximum Ratings ..................................................................................................................... 34
9.2 Recommended Operating Conditions ...................................................................................................... 34
9.3 Input/Output Terminal Characteristics ...................................................................................................... 35
9.3.1 Switch-mode Regulator .............................................................................................................. 35
9.3.2 Low-voltage Linear Regulator ..................................................................................................... 35
9.3.3 Digital Terminals ......................................................................................................................... 35
9.3.4 AIO ............................................................................................................................................. 36
9.4 Junction Temperature .............................................................................................................................. 38
9.5 ESD Protection ......................................................................................................................................... 38
10 Current Consumption ........................................................................................................................................ 39
11 CSR Green Semiconductor Products and RoHS Compliance .......................................................................... 40
12 CSR1010 QFN Software Stack ......................................................................................................................... 41
13 Tape and Reel Information ................................................................................................................................ 42
13.1 Tape Orientation ...................................................................................................................................... 42
13.2 Tape Dimensions ..................................................................................................................................... 43
13.3 Reel Information ....................................................................................................................................... 44
13.4 Moisture Sensitivity Level ......................................................................................................................... 44
14 Document References ....................................................................................................................................... 45
Terms and Definitions ................................................................................................................................................ 46
List of Figures
Figure 1.1 Pinout Diagram .................................................................................................................................... 10
Figure 3.1 Clock Architecture ................................................................................................................................ 17
Figure 3.2 Crystal Driver Circuit ............................................................................................................................ 17
Figure 3.3 Sleep Clock Crystal Driver Circuit ........................................................................................................ 18
Figure 5.1 Baseband Digits Block Diagram .......................................................................................................... 21
Figure 5.2 Typical PWM Signal on a PIO ............................................................................................................. 23
Figure 6.1 Example of an I²C Interface EEPROM Connection ............................................................................. 26
Figure 6.2 I²C Standard Mode 100 kHz Timing Diagram (Top Line: SCL, Bottom Line: SDA) ............................. 26
Figure 6.3 I²C Fast Mode 400 kHz Timing Diagram (Top Line: SCL, Bottom Line: SDA) .................................... 27
Figure 6.4 SPI Timing Diagram ............................................................................................................................. 28
Figure 6.5 Memory Boot-up Sequence ................................................................................................................. 29
Figure 7.1 Voltage Regulator Configuration .......................................................................................................... 31
Figure 12.1 Software Architecture .......................................................................................................................... 41
Figure 13.1 Tape Orientation .................................................................................................................................. 42
Figure 13.2 Tape Dimensions ................................................................................................................................. 43
Figure 13.3 Reel Dimensions .................................................................................................................................. 44
Production Information
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CSR1010 QFN
Data Sheet