CRT_BLUE*
CRT_BLUE
CRT_GREEN*
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_RED*
HSYNC
CRT_DDC_DATA
CRT_VSYNC
CRT_IREF
TV_IRTNC
TV_IRTNB
TV_IREF
TV_IRTNA
TV_DACB_OUT
TV_DACC_OUT
TV_DACA_OUT
LB_DATA2
LB_DATA1
LB_DATA0
LB_DATA2*
LB_DATA1*
LB_DATA0*
LA_DATA2
LA_DATA1
LA_DATA0
LA_DATA2*
LA_DATA1*
LA_DATA0*
LB_CLK
LB_CLK*
LA_CLK
LA_CLK*
L_VDDEN
L_VREFL
L_VREFH
L_VBG
L_IBG
L_DDC_CLK
L_DDC_DATA
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN0
EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3
EXP_A_RXN4
EXP_A_RXN5
EXP_A_RXN6
EXP_A_RXN7
EXP_A_RXN8
EXP_A_RXN9
EXP_A_RXN10
EXP_A_RXN11
EXP_A_RXN12
EXP_A_RXN13
EXP_A_RXN15
EXP_A_RXN14
EXP_A_RXP0
EXP_A_RXP1
EXP_A_RXP2
EXP_A_RXP4
EXP_A_RXP3
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXP10
EXP_A_RXP9
EXP_A_RXP8
EXP_A_RXP11
EXP_A_RXP12
EXP_A_RXP14
EXP_A_RXP13
EXP_A_RXP15
EXP_A_TXN1
EXP_A_TXN0
EXP_A_TXN3
EXP_A_TXN2
EXP_A_TXN6
EXP_A_TXN5
EXP_A_TXN4
EXP_A_TXN7
EXP_A_TXN8
EXP_A_TXN9
EXP_A_TXN10
EXP_A_TXN11
EXP_A_TXN12
EXP_A_TXN14
EXP_A_TXN13
EXP_A_TXN15
EXP_A_TXP0
EXP_A_TXP2
EXP_A_TXP1
EXP_A_TXP3
EXP_A_TXP4
EXP_A_TXP5
EXP_A_TXP7
EXP_A_TXP6
EXP_A_TXP8
EXP_A_TXP9
EXP_A_TXP10
EXP_A_TXP12
EXP_A_TXP11
EXP_A_TXP13
EXP_A_TXP14
EXP_A_TXP15
L_CLKCTLB
L_BKLTEN
L_CLKCTLA
L_BKLTCTL
(3 OF 10)
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
IN
IN
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
IO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IO
IO
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used
Can leave all signals NC if LVDS is not implemented
CRT Disable
TV-Out Disable
Composite: DACA only
TV-Out Signal Usage:
HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core
Unused DAC outputs must remain powered, but can omit
S-Video: DACB & DACC only
connect to GND through 75-ohm resistors.
Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and
Component: DACA, DACB & DACC
rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.
VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.
Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.
filtering components. Unused DAC outputs should
Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie
VCCD_LVDS must remain powered with proper decoupling.
LVDS Disable
Otherwise, tie VCCD_LVDS to GND also.
SDVOC_CLKP
SDVOC_BLUE
SDVOC_GREEN
SDVOC_RED
SDVOB_BLUE
SDVOB_CLKP
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_CLKN
SDVOC_RED#
SDVOC_GREEN#
SDVOC_BLUE#
SDVOC_CLKN
SDVOB_RED
SDVOB_GREEN
SDVO_FLDSTALL
SDVO_INT
SDVO_TVCLKIN
SDVO_INT#
SDVO_TVCLKIN#
SDVO Alternate Function
SDVO_FLDSTALL#
BGA
LEMENU
945GM
NB
B19
B18
B16
J20
A19
C18
A16
F29
F28
D30
D29
G30
F30
E27
E26
A37
A36
B35
B34
C37
B37
A33
A32
C32
C33
F32
C35
B38
G25
G26
H29
H30
J30
D32
G23
R40
P36
N40
M36
L40
J36
H40
G36
AB40
AA36
Y40
W36
V40
T36
F40
D36
T40
R36
P40
N36
M40
L36
J40
H36
AC40
AB36
AA40
Y36
W40
V36
G40
F36
R38
P34
N38
M34
L38
J34
H38
G34
AB38
AA34
Y38
W34
V38
T34
F38
D34
T38
R34
P38
N34
M38
L34
J38
H34
AC38
AB34
AA38
Y34
W38
V34
G38
F34
D38
D40
H23
B21
A21
J22
B22
C22
C25
C26
D23
E23
U1200
402
MF-LF
1/16W
1%
24.9
2
1
R1310
051-6941
03
103
13
SYNC_MASTER=(MASTER)
SYNC_DATE=(MASTER)
NB PEG / Video Interfaces
=PP1V5_S0_NB_PCIE
LVDS_BKLTCTL
LVDS_CLKCTLA
LVDS_BKLTEN
LVDS_CLKCTLB
PEG_R2D_C_P<15>
PEG_R2D_C_P<14>
PEG_R2D_C_P<13>
PEG_R2D_C_P<11>
PEG_R2D_C_P<12>
PEG_R2D_C_P<10>
PEG_R2D_C_P<9>
PEG_R2D_C_P<8>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_P<5>
PEG_R2D_C_P<4>
PEG_R2D_C_P<3>
PEG_R2D_C_P<1>
PEG_R2D_C_P<2>
PEG_R2D_C_P<0>
PEG_R2D_C_N<15>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_N<12>
PEG_R2D_C_N<11>
PEG_R2D_C_N<10>
PEG_R2D_C_N<9>
PEG_R2D_C_N<8>
PEG_R2D_C_N<7>
PEG_R2D_C_N<4>
PEG_R2D_C_N<5>
PEG_R2D_C_N<6>
PEG_R2D_C_N<2>
PEG_R2D_C_N<3>
PEG_R2D_C_N<0>
PEG_R2D_C_N<1>
PEG_D2R_P<15>
PEG_D2R_P<13>
PEG_D2R_P<14>
PEG_D2R_P<12>
PEG_D2R_P<11>
PEG_D2R_P<8>
PEG_D2R_P<9>
PEG_D2R_P<10>
PEG_D2R_P<7>
PEG_D2R_P<6>
PEG_D2R_P<5>
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P<2>
PEG_D2R_P<1>
PEG_D2R_P<0>
PEG_D2R_N<14>
PEG_D2R_N<13>
PEG_D2R_N<12>
PEG_D2R_N<11>
PEG_D2R_N<10>
PEG_D2R_N<8>
PEG_D2R_N<6>
PEG_D2R_N<5>
PEG_D2R_N<4>
PEG_D2R_N<3>
PEG_D2R_N<2>
PEG_D2R_N<1>
PEG_D2R_N<0>
PEG_COMP
LVDS_DDC_DATA
LVDS_DDC_CLK
LVDS_IBG
TP_LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDS_VDDEN
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
CRT_IREF
CRT_DDC_DATA
CRT_RED_L
CRT_DDC_CLK
CRT_RED
CRT_GREEN
CRT_GREEN_L
CRT_BLUE
CRT_BLUE_L
PEG_D2R_N<15>
PEG_D2R_N<9>
PEG_D2R_N<7>
TV_IRTNC
TV_IRTNB
TV_IRTNA
TV_IREF
TV_DACC_OUT
TV_DACB_OUT
TV_DACA_OUT
CRT_VSYNC_R
CRT_HSYNC_R
62 19
19
19
19
19
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
65
65
65
19
19
19
19
19
19
19
19
19