HY57V641620HG芯片介绍

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HY57V641620HG-I Series

4 Banks x 1M x 16Bit Synchronous DRAM

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use

of circuits described. No patent licenses are implied.

Rev. 1.0/Jan. 02 1

DESCRIPTION

The Hynix HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the Mobile applications r which require

low power consumption and extended temperature range. HY57V641620HG is organized as 4banks of 1,048,576x16.

HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro-

nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output

voltage levels are compatible with LVTTL.

Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated

by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of

read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst

read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)

FEATURES

• Single 3.3±0.3V power supply

Note)

• All device pins are compatible with LVTTL interface

• JEDEC standard 400mil 54pin TSOP-II with 0.8mm

of pin pitch

• All inputs and outputs referenced to positive edge of

system clock

• Data mask function by UDQM or LDQM

• Internal four banks operation

• Auto refresh and self refresh

• 4096 refresh cycles / 64ms

• Programmable Burst Length and Burst Type

- 1, 2, 4, 8 or Full page for Sequential Burst

- 1, 2, 4 or 8 for Interleave Burst

• Programmable CAS

Latency ; 2, 3 Clocks

ORDERING INFORMATION

Note : VDD(Min) of HY57V641620HG(L)T-5I/55I/6I is 3.135V

Part No. Clock Frequency Power Organization Interface Package

HY57V641620HGT-5I/55I/6I/7I 200/183/166/143MHz

Normal

4Banks x 1Mbits

x16

LVTTL 400mil 54pin TSOP II

HY57V641620HGT-KI 133MHz

HY57V641620HGT-HI 133MHz

HY57V641620HGT-8I 125MHz

HY57V641620HGT-PI 100MHz

HY57V641620HGT-SI 100MHz

HY57V641620HGLT-5I/55I/6I/7I 200/183/166/143MHz

Low power

HY57V641620HGLT-KI 133MHz

HY57V641620HGLT-HI 133MHz

HY57V641620HGLT-8I 125MHz

HY57V641620HGLT-PI 100MHz

HY57V641620HGLT-SI 100MHz

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