i.MX6SoloLite CPU Datasheet: Low-Power Multimedia Processor for E-Ink Devices

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本文档是Freescale半导体提供的MCIMX6LxDVN10xx CPU的数据手册，针对的是Kindle等电子墨水阅读器使用的低功耗处理器。该处理器采用了先进的ARM Cortex-A9 MPCore架构，最高运行速度可达1GHz，集成了2D图形处理器，以及高度优化的电源管理功能。这款单核处理器在保证高性能的同时，着重于节省能源，非常适合对功耗有极高要求的应用场景。 i.MX6SoloLite处理器的特点包括： 1. 性能与效率：基于ARM Cortex-A9架构，它提供了一个高效能的核心，可以处理多任务，同时保持低功耗。这对于电子阅读设备至关重要，因为长时间使用而不会迅速消耗电池。 2. 多媒体支持：内置2D图形处理器，使得处理图像和视频显示更为流畅，对于电子书中的插图和文字渲染能力强大。 3. 内存接口：支持32位DDR3-800内存接口，这确保了数据传输的高速和稳定，提高了系统的响应速度。 4. 丰富的外设连接：处理器内置了多种接口，如WLAN、蓝牙、GPS、硬盘接口、显示接口以及摄像头传感器接口，为外部设备提供了广泛的连接选项，方便与其他硬件组件集成。 5. 应用领域：由于其低功耗特性，MCIMX6LxDVN10xx特别适用于需要长时间待机且对能耗敏感的设备，如电子阅读器、智能手表、物联网设备等。 6. 文档结构：文档提供了详细的订单信息（见第3页表1），说明了产品的订购方式和规格参数，便于工程师在设计和选择硬件时参考。总结来说，MCIMX6LxDVN10xx是一款专为多媒体应用而设计的高性能低功耗处理器，通过集成的先进技术，实现了在电子墨水设备中的高效能和长续航。对于了解和使用这款CPU的开发者和系统设计师来说，这份数据手册提供了关键的技术细节和配置信息。

i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 3

16 Freescale Semiconductor

Modules List

SRC_POR_B This cold reset negative logic input resets all modules and logic in the IC.

May be used in addition to internally generated power on reset signal (logical AND, both internal and

external signals are considered active low)

RTC_XTALI/

RTC_XTALO

If the user wishes to configure RTC_XTALI and RTC_XTALO as an RTC oscillator, a 32.768 kHz crystal

(100 k ESR, 10 pF load) should be connected between RTC_XTALI and RTC_XTALO. Keep in mind

the capacitors implemented on either side of the crystal are about twice the crystal load capacitor. To hit

the exact oscillation frequency, the board capacitors need to be reduced to account for board and chip

parasitics. The integrated oscillation amplifier is self biasing, but relatively weak. Care must be taken to

limit parasitic leakage from RTC_XTALI and RTC_XTALO to either power or ground (>100 M). This will

debias the amplifier and cause a reduction of startup margin. Typically RTC_XTALI and RTC_XTALO

should bias to approximately 0.5 V.

If it is desired to feed an external low frequency clock into RTC_XTALI, the RTC_XTALO pin should be

left floating or driven with a complimentary signal. The logic level of this forcing clock should not exceed

VDD_SNVS_CAP level and the frequency should be <100 kHz under typical conditions.

In the case when a high accuracy real time clock is not required, the system may use an internal low

frequency ring oscillator. It is recommended to connect RTC_XTALI to GND and keep RTC_XTALO

floating.

TEST_MODE TEST_MODE is for Freescale factory use. This signal is internally connected to an on-chip pull-down

device. The user must either float this signal or tie it to GND.

XTALI/XTALO A 24.0 MHz crystal should be connected between XTALI and XTALO. level and the frequency should be

<32 MHz under typical conditions.

The crystal must be rated for a maximum drive level of 250 W. An ESR (equivalent series resistance) of

typically 80  is recommended. Freescale BSP (board support package) software requires 24 MHz on

XTALI/XTALO.

The crystal can be eliminated if an external 24 MHz oscillator is available in the system. In this case,

XTALI must be directly driven by the external oscillator and XTALO is floated. The XTALI signal level must

swing from ~0.8 x NVCC_PLL_OUT to ~0.2 V.

This clock is used as a reference for USB, so there are strict frequency tolerance and jitter requirements.

See the XTALOSC chapter and relevant interface specifications chapters of the i.MX 6SoloLite reference

manual, for details.

ZQPAD DRAM calibration resistor 240  1% used as reference during DRAM output buffer driver calibration

should be connected between this pad and GND.

Table 4. JTAG Controller Interface Summary

JTAG I/O Type On-Chip Termination

JTAG_TCK Input 47 kpull-up

JTAG_TMS Input 47 kpull-up

JTAG_TDI Input 47 k

pull-up

JTAG_TDO 3-state output Keeper

JTAG_TRST_B Input 47 kpull-up

JTAG_MODE Input 100 kpull-up

Table 3. Special Signal Considerations (continued)

Signal Name Remarks

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