IEEE 91-1984标准详解：数字逻辑电路符号指南

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"IEEE Standard 91-1984是由德州仪器（Texas Instruments, TI）针对数字逻辑电路符号规范制定的一项重要标准。该标准主要提供了一套统一的符号表示方法，以便于电子工程师在设计、文档编写和数据手册中理解和交流数字逻辑电路的概念和功能。标准中详述了诸如门电路、触发器、寄存器等基本逻辑元件的符号，并规定了这些符号在电路图中的正确使用方式，这对于确保设计的一致性和可读性至关重要。标准强调了重要通知，指出TI保留随时更改产品或停止服务的权利，因此建议客户在下单前务必获取最新的技术资料以验证信息的时效性。TI对其半导体产品的性能提供标准保修，但测试仅针对销售时适用的规格进行，政府要求强制测试的参数会得到额外关注。这意味着并非所有设备参数都会被全面测试，用户需自行评估其应用是否满足标准。值得注意的是，标准中特别提到了"CriticalApplications"，即那些可能涉及人身伤害、严重财产损失或环境破坏的关键应用领域。对于此类应用，TI明确表示其半导体产品并未设计、意图或保证用于生命支持系统。这意味着在选择和使用这些产品时，用户必须充分了解风险并采取适当的措施来保障安全。学习和遵循IEEE Standard 91-1984对于从事数字逻辑电路设计和开发的专业人员来说是必不可少的，它不仅规范了行业内的交流，还对确保设计的安全性和可靠性起到了关键作用。"

2 Symbol Composition

A symbol comprises an outline or a combination of outlines together with one or more qualifying symbols.

The shape of the symbols is not significant. As shown in Figure 1, general qualifying symbols are used to tell

exactly what logical operation is performed by the elements. Table 1 shows general qualifying symbols

defined in the new standards. Input lines are placed on the left and output lines are placed on the right. When

an exception is made to that convention, the direction of signal flow is indicated by an arrow, as shown in

Figure 1.

Output

Lines

Input

Lines

Outline General Qualifying Symbol

* Possible positions for qualifying symbols relating to inputs and outputs

Figure 1. Symbol Composition

All outputs of a single, unsubdivided element always have identical internal logic states determined by the

function of the element, except when otherwise indicated by an associated qualifying symbol or label inside

the element.

The outlines of elements may be abutted or embedded, in which case the following conventions apply. There

is no logic connection between the elements when the line common to their outlines is in the direction of signal

flow. There is at least one logic connection between the elements when the line common to their outlines is

perpendicular to the direction of signal flow. The number of logic connections between elements will be

clarified by the use of qualifying symbols, and this is discussed further under that topic. If no indications are

shown on either side of the common line, it is assumed there is only one connection.

When a circuit has one or more inputs that are common to more than one element of the circuit, the

common-control block may be used. This is the only distinctively shaped outline used in the IEC system.

Figure 2 shows that, unless otherwise qualified by dependency notation, an input to the common-control

block is an input to each of the elements below the common-control block.

≡

Common-Control Block

Figure 2. Common-Control Block

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