40.5 Interfaces and Protocol ........................................................................................................................ 40-7
40.5.1 Display Controller Interface .......................................................................................................... 40-7
40.5.2 RGB Interface ............................................................................................................................... 40-8
40.5.3 HSA Mode .................................................................................................................................... 40-8
40.5.4 HSE Mode .................................................................................................................................. 40-10
40.5.5 Transfer General Data in Video Mode ........................................................................................ 40-11
40.5.6 MIPI DSIM Converts RGB Interface to Video Mode ................................................................... 40-12
40.6 Configuration ...................................................................................................................................... 40-13
40.7 PLL ..................................................................................................................................................... 40-13
40.8 Buffer .................................................................................................................................................. 40-13
40.9 DSIM .................................................................................................................................................. 40-14
40.9.1 Register Description ................................................................................................................... 40-14
40.10 CSIS ................................................................................................................................................. 40-38
40.10.1 Interfaces and Protocol ............................................................................................................. 40-38
40.10.2 Configuration ............................................................................................................................ 40-43
40.10.3 Interrupt .................................................................................................................................... 40-43
40.10.4 Clock Specification ................................................................................................................... 40-44
40.10.5 Register Description ................................................................................................................. 40-45
40.11 D-PHY .............................................................................................................................................. 40-57
40.11.1 Architecture ............................................................................................................................... 40-57
41 VIDEO INPUT PROCESSOR (VIP)............................................................ 41-1
41.1 Overview .............................................................................................................................................. 41-1
41.2 Features ............................................................................................................................................... 41-1
41.3 Block Diagram ...................................................................................................................................... 41-2
41.4 VIP Interconnection .............................................................................................................................. 41-3
41.4.1 Block Diagram .............................................................................................................................. 41-3
41.4.2 Clock Generation .......................................................................................................................... 41-4
41.4.3 Sync Generation ........................................................................................................................... 41-4
41.4.4 External Data Valid and Field ....................................................................................................... 41-9
41.4.5 Data Order .................................................................................................................................. 41-10
41.4.6 Status .......................................................................................................................................... 41-11
41.4.7 FIFO Controls ............................................................................................................................. 41-11
41.4.8 Recommend Setting for Video Input Port ................................................................................... 41-12
41.5 Clipper & Decimator ........................................................................................................................... 41-13
41.5.1 Clipping & Scale-down ............................................................................................................... 41-13
41.5.2 Output Data Format .................................................................................................................... 41-15
41.5.3 Interlace Scan Mode ................................................................................................................... 41-16
41.5.4 Pixels Alignment ......................................................................................................................... 41-16
41.6 Interrupt Generation ........................................................................................................................... 41-17
41.7 Register Description ........................................................................................................................... 41-18
41.7.1 Register Map Summary .............................................................................................................. 41-18
42 MULTI-FORMAT VIDEO CODEC .............................................................. 42-1
42.1 Overview .............................................................................................................................................. 42-1
42.2 Functional Description ......................................................................................................................... 42-2
42.2.1 List of Video CODECs .................................................................................................................. 42-2
42.2.2 Supported Video Encoding Tools ................................................................................................. 42-3
42.2.3 Supported Video Decoding Tools ................................................................................................. 42-4
42.2.4 Supported JPEG Tools ................................................................................................................. 42-5
42.2.5 Non-codec related features .......................................................................................................... 42-6
nexell / ys.kim at 2015.02.12