AZO / a-Si / c-Si异质结在p型硅太阳能电池中的应用

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"这篇研究论文探讨了在p型硅衬底上制备AZO（铝锌氧化物）/非晶硅（a-Si）/单晶硅（c-Si）异质结结构的方法及其在太阳能电池应用中的潜力。通过PECVD（等离子体增强化学气相沉积）和MBE（分子束外延）系统，研究人员成功构建了这种结构，并通过I-V特性和少数载流子寿命测量评估了其电学性质。研究发现，经过低温退火处理的AZO/a-Si/c-Si异质结结构能够对硅表面和体进行有效的钝化，而高温退火则可能导致较大的暗电流和较低的少数载流子寿命。" 1. 引言锌氧化物（ZnO）作为一种有前途的透明导电氧化物，因其优异的光学透明性、良好的电导率以及较低的成本，被广泛应用于太阳能电池的前端电极。与硅结合形成异质结，可以优化电池的能带结构，提高光吸收效率和载流子收集能力。 2. 材料与方法研究中使用PECVD技术沉积AZO薄膜，这允许在各种基材上精确控制薄膜的厚度和电学特性。接着，通过MBE系统添加非晶硅层，MBE以其原子级精度调控材料生长而闻名。最后，将整个结构在不同温度下退火，以观察和理解退火过程对异质结性能的影响。 3. 结果与讨论通过I-V曲线分析，研究人员揭示了AZO/a-Si/c-Si结构的电性能，表明低温退火有助于提高电池的开路电压和填充因子，这是由于表面和体内的有效钝化作用。然而，高温退火可能导致缺陷的增加，从而增加暗电流并降低少数载流子的寿命，这对太阳能电池的效率是不利的。 4. 结论该研究强调了退火温度对AZO/a-Si/c-Si异质结结构性能的重要性，提出在优化工艺参数时应考虑退火温度对硅表面和体内钝化效果的影响。这为设计更高效的太阳能电池提供了新的见解，并为进一步优化AZO/Si界面的性能奠定了基础。关键词：薄膜，AZO/a-Si/c-Si异质结，钝化，太阳能材料这篇研究论文为理解和改进基于p型硅的太阳能电池的性能提供了一个重要的视角，特别是通过调控AZO和硅之间的异质结结构以及退火处理来提升电池的效率。这为未来开发更高效、成本效益高的太阳能电池技术提供了有价值的实验数据和理论指导。

The preparation of AZO/a-Si/c-Si heterojunction structure

on p-type silicon substrate for solar cell application

Shuoshuo Xu

, Zongcun Liang

, Hui Shen

a,b

Institute for Solar Energy Systems, Sun Yat-Sen University, Guangzhou 510275, P.R. China

ShunDe SYSU Institute for Solar Energy, Foshan 528300, P.R. China

article info

Article history:

Received 30 May 2014

Accepted 17 September 2014

Available online 26 September 2014

Keywords:

Thin ﬁlms

AZO/a-Si/c-Si heterojunction

Passivation

Solar energy materials

abstract

An AZO/a-Si/c-Si heterojunction structure was prepared by PECVD and MBE systems. The electrical

properties of the AZO/a-Si/c-Si heterojunction structure have been carried out by means of I–V and

minority carrier lifetime measurements. The AZO/a-Si/c-Si heterojunction devices annealed in low

temperatures lead to effects of the passivation of the surface and bulk of Si, while the annealing of

AZO/a-Si/c-Si heterojunction devices in higher temperatures will cause a larger dark current and lower

minority carrier lifetime.

1. Introduction

Zinc oxide (ZnO) is a promising wide-band-gap semiconductor

for various applications such as hetero-junction solar cells [1],

light-emitting diodes [2], and transparent conducting electrodes

[3]. The characteristics of ZnO/p-Si heterojunction [4–6] and

n-ZnO nanorods/p-Si heterojunction [7–9] devices have been

widely investigated for the fabrication of efﬁcient and low-cost

optoelectronic devices. At the same time, the ZnO/Si hetero-

junction solar cells have been studied for its potentially

high conversion-efﬁcient and cost-effective solar cells [1,10,11].

However, the ZnO/Si heterojunction solar cells always apply a ZnO/

n-Si heterojunction structure, and the ZnO/p-Si heterojunction

solar cells have been hardly reported for the conversion efﬁcient

performance. At the same time, using the ZnO thin ﬁlm as an

emitter layer will cause a high interface state density, resulting in a

lower open circuit voltage (V

) [10]. To obtain a lower interface

state density, a SiO

layer is deposited to passivate the surface of Si

[11,12]. However, the thickness of the SiO

layer deposed in a very

high temperature with best passivation is always limited to

about 2 nm [11] , which is hard to control precisely.

The heterojunction with intrinsic thin layer (HIT) solar cells

have a very high conversion efﬁciency of over 23.0% by the

deposition of a high quality intrinsic amorphous silicon (a-Si)

layer [13]. This a-Si layer could drastically reduce surface recom-

bination and passivate the surface of c-Si [14], leading to the best

passivation results so far. The a-Si layer is always deposited by

the conventional plasma enhanced chemical vapor deposition

(PECVD) process. The deposition of a-Si layer is a low temperature

(below 230 1C) processing and the thickness is about 10 nm

[13,15], which is easy to control. However, the a-Si thin ﬁlm in a

high temperature environment will cause that the hydrogen ions

to overﬂow from the a-Si [16]. The high temperature in the

deposition [5,6,10,17] or annealing process [1,17] of the ZnO thin

ﬁlm prevents the ZnO/a-Si/c-Si structure from an efﬁcient p–i–n

heterojunction. For preparing an efﬁcient p–i–n heterojunction,

the temperature in the deposition of the ZnO thin ﬁlm should be

chosen for the best device performance.

In this study, p-Si substrat es, on which the main commercial

photov oltaic production was based for low-cost produce, were used

to form an aluminum doped ZnO (AZO)/a-Si/c-Si hetero-

junction structure as an efﬁcient p–i–njunctionbydepositingan

intrinsic a-Si thin ﬁlm about 10 nm and an AZO thin ﬁlm of n-type

behavior on p-Si substrates in low temperatures (below 230 1C). For

choosing the suitable temperatures of the deposition, the samples

were annealed at different temperatures to understand the behavior of

passivation of a-Si thin ﬁlm and the device performance of the p–i–n

heterojunction which were prepared with different temperatures. The

annealing of AZO/a-Si/c-Si heterojunction devices in a low processing

temperature (250 1C) will enhance the surface passivation of Si wafer ,

while annealing in a higher temperature (above 340 1C) will drastically

reduce the passiv ation.

2. Material and methods

p-Type (100) Si (3.6–3.8 Ω cm) wafer was cleaned by HF (10%)

for 2 min. Then, an intrinsic a-Si layer of a thickness of about

Contents lists available at ScienceDirect

journal homepage: www.elsevier.com/locate/matlet

Materials Letters

http://dx.doi.org/10.1016/j.matlet.2014.09.066

Corresponding author.

E-mail addresses: xushuoshuo00@163.com (S. Xu),

liangzc@mail.sysu.edu.cn (Z. Liang).

Materials Letters 137 (2014) 428–431

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