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首页水果本本J30主板技术交流图纸
水果本本J30主板技术交流图纸
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更新于2024-07-26
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水果本本J30图纸是一份专为技术交流设计的主板规格文档,针对的是苹果(Apple)产品线中的MAC J30 MLB型号。这份图纸详细地列出了主板的各项组成部分、布局设计、接口和电路图,旨在帮助技术人员理解并维护这款特定型号的计算机硬件。由于其标注的“仅供技术交流”和“下载后1周内删除,禁止商业用途”的条件,表明这并非公开发布的正式产品手册,而是内部或非公开的资源。
在文档中,你可能会找到以下关键知识点:
1. **主板架构**:文档会介绍J30 MLB主板的整体架构,包括处理器、内存、硬盘接口、扩展槽等关键部件的位置和连接方式。
2. **电路设计**:详尽的电路图和原理图能揭示主板的电气设计,如电源管理、信号传导路径、以及故障检测与隔离系统。
3. **接口规格**:涵盖USB、Thunderbolt、PCIe等高速接口的规格和功能描述,这对于开发者和维修人员配置外设或升级硬件至关重要。
4. **BIOS设置**:如果包含,可能有针对特定BIOS版本的详细说明,指导用户如何进行基本设置和高级调试。
5. **兼容性和兼容性限制**:文档可能提及与J30 MLB主板兼容的CPU、内存、显卡和其他配件的列表,以及可能存在的不兼容情况。
6. **安全与散热**:讨论了如何确保主板的稳定运行和防止过热的技术措施,如散热器布局和风扇控制。
7. **维修和故障排查**:提供了一些常见问题的解决策略,以及预防性维护建议。
8. **加密和版权信息**:由于强调“禁止商业用途”,图纸可能存在加密手段或版权声明,确保知识产权保护。
9. **版本更新和历史记录**:如果有多个版本的J30主板,可能会列出每个版本的主要改进和差异。
阅读这份图纸,专业人士能够深入理解MAC J30 MLB主板的工作原理和操作细节,从而在技术支持和维修过程中提供精准的帮助。然而,由于其非公开性质,对于普通用户和未经授权的商业活动来说,这些信息是不可获取的。
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
D
SIZE
DRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
DESCRIPTION
REFERENCE DES
BOM OPTION
QTY
PART NUMBER
CRITICAL
Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402
CPU VCCIO/VCCPQ DECOUPLING
Intel recommendation (Section 6.5): 26x 1uF, 10x 10uF, 2x 330uF
PLACEMENT_NOTE (C1684-C167F):
PLACEMENT_NOTE (C1640-C1645):
PLACEMENT_NOTE (C1655-C1666):
CPU VCCPLL DECOUPLING
Intel recommendation (section 6.4): 2x 1uF, 1x 330uF
PLACEMENT_NOTE (C1646-C1671):
CPU VCCPLL Low pass filter
PLACEMENT_NOTE (C1672-C1681):
Note:The smallest 10mOhm available in the library are 0805s
Intel recommendation (Section 6.2): 35x 2.2uF, 25x 22uF, 4x 470uF
CPU VCORE DECOUPLING
All INTEL recommendations from Intel doc #4439028 Huron River Platform Power Design Guide
PLACEMENT_NOTE (C1667-C1679):
21
R1601
0603
1%
1/4W
MF
0.010
2
1
C160Y
10%
X5R
10V
1UF
402
PLACE_NEAR=U1000.AK65:2.54 mm:NO_VIA
2
1
C1632
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1607
CRITICAL
20%
4V
X5R
2.2UF
402
2
1
C1608
402
2.2UF
X5R
4V
20%
CRITICAL
2
1
C1635
X5R
402
2.2UF
4V
20%
CRITICAL
2
1
C1609
CRITICAL
2.2UF
4V
402
X5R
20%
2
1
C1610
CRITICAL
20%
4V
X5R
402
2.2UF
2
1
C1698
10V
10%
402
X5R
1UF
2
1
C1637
X5R
4V
402
20%
CRITICAL
2.2UF
2
1
C1612
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1638
2.2UF
402
4V
20%
CRITICAL
X5R
2
1
C1613
402
X5R
4V
20%
CRITICAL
2.2UF
2
1
C1639
2.2UF
X5R
4V
20%
CRITICAL
402
2
1
C1640
CRITICAL
2.2UF
402
X5R
4V
20%
2
1
C1615
X5R
2.2UF
402
4V
20%
CRITICAL
2
1
C1699
10%
10V
402
1UF
X5R
2
1
C1641
2.2UF
20%
402
CRITICAL
4V
X5R
2
1
C1642
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1617
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1643
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1644
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1645
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1647
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1648
402
2.2UF
X5R
4V
20%
CRITICAL
2
1
C1623
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1624
CRITICAL
2.2UF
402
X5R
4V
20%
2
1
C160Z
20%
CASE-D2-SM
2V
POLY
330UF-0.006OHM
PLACE_NEAR=U1000.BC1:5mm
2
1
C161E
603
X5R
10UF
6.3V
20%
Place near U1000 on bottom side
2
1
C162A
10UF
CERM-X5R
6.3V
Place near U1000 on bottom side
20%
0402-1
2
1
C162B
Place near U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C162C
Place near U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C162D
Place near U1000 on bottom side
CERM-X5R
6.3V
20%
0402-1
10UF
2
1
C169A
402
1UF
10V
10%
X5R
2
1
C162E
6.3V
Place near U1000 on bottom side
10UF
CERM-X5R
20%
0402-1
2
1
C167A
Place near U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C167B
Place near U1000 on bottom side
0402-1
10UF
CERM-X5R
6.3V
20%
2
1
C167C
Place near U1000 on bottom side
10UF
0402-1
20%
6.3V
CERM-X5R
2
1
C167E
CASE-B2-SM
2.5V
TANT
330UF
20%
2
1
C167G
CASE-B2-SM
2.5V
TANT
20%
330UF
2
1
C167D
CASE-B2-SM
2.5V
TANT
330UF
20%
2
1
C167H
20%
330UF
TANT
2.5V
CASE-B2-SM
2
1
C167J
20%
330UF
TANT
2.5V
CASE-B2-SM
2
1
C169B
10%
10V
X5R
402
1UF
2
1
C169C
10%
X5R
10V
1UF
402
2
1
C1684
Place on bottom side of U1000
10%
10V
1UF
402
X5R
3 2
1
C1680
Place near inductors on bottom side.
470UF-4MOHM
20%
D2T-SM
POLY-TANT
2.0V
2
1
C1685
10%
1UF
10V
X5R
Place on bottom side of U100.
402
2
1
C1686
10%
10V
X5R
Place on bottom side of U1000
1UF
402
3 2
1
C1681
20%
Place near inductors on bottom side.
D2T-SM
2.0V
470UF-4MOHM
POLY-TANT
2
1
C1667
Place close to U1000 on bottom side.
CRITICAL
OMIT
X5R-CERM-1
20%
6.3V
22UF
603
2
1
C1655
22UF
Place close to U1000 on top side.
CRITICAL
X5R-CERM-1
20%
6.3V
603
OMIT
2
1
C1668
X5R-CERM-1
CRITICAL
20%
6.3V
22UF
603
OMIT
2
1
C1669
CRITICAL
20%
6.3V
22UF
X5R-CERM-1
603
OMIT
2
1
C1656
22UF
X5R-CERM-1
CRITICAL
20%
6.3V
603
OMIT
2
1
C1657
CRITICAL
X5R-CERM-1
603
20%
6.3V
22UF
OMIT
2
1
C1687
10%
X5R
1UF
10V
Place on bottom side of U1000
402
2
1
C1688
1UF
10V
X5R
10%
402
3 2
1
C1682
20%
Place near inductors on bottom side.
2.0V
D2T-SM
POLY-TANT
470UF-4MOHM
2
1
C1689
10%
1UF
402
X5R
10V
3 2
1
C1683
20%
Place near inductors on bottom side.
D2T-SM
2.0V
470UF-4MOHM
POLY-TANT
2
1
C1670
CRITICAL
OMIT
20%
6.3V
22UF
603
X5R-CERM-1
2
1
C1658
CRITICAL
20%
6.3V
603
X5R-CERM-1
22UF
OMIT
2
1
C1671
CRITICAL
20%
6.3V
22UF
603
X5R-CERM-1
NOSTUFF
2
1
C167F
10%
1UF
10V
X5R
402
2
1
C1672
CRITICAL
20%
6.3V
22UF
603
X5R-CERM-1
OMIT
2
1
C1659
CRITICAL
20%
6.3V
22UF
603
X5R-CERM-1
NOSTUFF
2
1
C1660
CRITICAL
OMIT
20%
6.3V
22UF
603
X5R-CERM-1
2
1
C1650
2.2UF
20%
4V
X5R
402
CRITICAL
2
1
C1625
CRITICAL
20%
4V
X5R
402
2.2UF
2
1
C1600
CRITICAL
20%
X5R
4V
402
2.2UF
2
1
C1651
20%
4V
X5R
402
2.2UF
CRITICAL
2
1
C1652
CRITICAL
20%
4V
X5R
402
2.2UF
2
1
C1627
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1653
CRITICAL
20%
4V
X5R
402
2.2UF
2
1
C1628
2.2UF
4V
20%
CRITICAL
X5R
402
2
1
C1654
X5R
2.2UF
CRITICAL
20%
4V
402
2
1
C1604
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1631
2.2UF
402
X5R
4V
20%
CRITICAL
2
1
C1606
4V
2.2UF
402
X5R
20%
CRITICAL
2
1
C169D
402
10%
X5R
10V
1UF
2
1
C169E
10%
10V
X5R
1UF
402
2
1
C169F
10%
X5R
10V
1UF
402
2
1
C161A
10%
X5R
10V
402
1UF
2
1
C161B
10%
X5R
10V
1UF
402
2
1
C161C
10%
10V
X5R
1UF
402
2
1
C161D
402
10%
X5R
10V
1UF
2
1
C1690
402
10%
X5R
1UF
10V
2
1
C1691
10%
1UF
X5R
10V
402
2
1
C1692
10%
10V
X5R
1UF
402
2
1
C1693
10%
X5R
10V
1UF
402
2
1
C1697
X5R
10V
402
1UF
10%
2
1
C1673
NOSTUFF
CRITICAL
20%
6.3V
22UF
603
X5R-CERM-1
2
1
C1674
CRITICAL
X5R-CERM-1
20%
6.3V
603
22UF
NOSTUFF
2
1
C1661
OMIT
22UF
6.3V
X5R-CERM-1
CRITICAL
20%
603
2
1
C1662
603
CRITICAL
20%
6.3V
22UF
X5R-CERM-1
NOSTUFF
2
1
C1675
NOSTUFF
CRITICAL
6.3V
20%
22UF
603
X5R-CERM-1
2
1
C1663
22UF
CRITICAL
20%
6.3V
603
X5R-CERM-1
NOSTUFF
2
1
C1694
402
X5R
10V
1UF
10%
2
1
C1695
10%
1UF
10V
X5R
402
2
1
C1696
10%
10V
X5R
1UF
402
2
1
C1676
CRITICAL
20%
6.3V
22UF
603
X5R-CERM-1
NOSTUFF
2
1
C161F
Place near U1000 on bottom side
0402-1
20%
6.3V
CERM-X5R
10UF
2
1
C1677
CRITICAL
OMIT
20%
6.3V
22UF
603
X5R-CERM-1
2
1
C1664
CRITICAL
OMIT
X5R-CERM-1
20%
6.3V
22UF
603
2
1
C1665
CRITICAL
20%
6.3V
22UF
603
X5R-CERM-1
NOSTUFF
2
1
C1678
X5R-CERM-1
CRITICAL
OMIT
20%
6.3V
22UF
603
2
1
C1666
CRITICAL
OMIT
20%
6.3V
22UF
X5R-CERM-1
603
2
1
C1679
6.3V
CRITICAL
OMIT
20%
22UF
603
X5R-CERM-1
21
R1600
402
5%
MF-LF
0
1/16W
2
1
C160X
Place near U1000 on top side
10%
10V
PLACE_NEAR=U1000.AK63:2.54 mm:NO_VIA
X5R
1UF
402
SYNC_DATE=09/27/2011
CPU DECOUPLING-I
SYNC_MASTER=JACK_J30
138S0691
16
CRITICAL
CAP,CER,X5R,22uF,20%,6.3V,0603,SAMSUNG
C1655,C1660,C1661,C1664,C1666,C1667,C1670,C1677,C1678,C1679,C1657,C1672,C1658,C1669,C1668,C1656
=PP1V05_S0_CPU_VCCPQE
=PP1V8_S0_CPU_VCCPLL
=PP1V8_S0_CPU_VCCPLL_R
=PP1V05_S0_CPU_VCCIO
=PPVCORE_S0_CPU
051-9058
4.0.0
16 OF 109
14 OF 86
7 8
12
7
7
12
7 9
10 12
7 9
12
DESCRIPTION
REFERENCE DES
BOM OPTION
QTY
PART NUMBER
CRITICAL
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
D
SIZE
DRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
Intel recommendation (section 6.3): 21x 1uF, 6x 10uF, 6x 22uF, 2x 470uF
Intel recommendation (Section 6.6): 6x 1uf, 5x 10uf, 1x 330uf
PLACEMENT_NOTE (C1738-C1747):
CPU VCCSA DECOUPLING
PLACEMENT_NOTE (C1700-C1710):
Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402
CPU VDDQ/VCCDQ DECOUPLING
PLACEMENT_NOTE (C1711-C1716):
VAXG DECOUPLING
PLACEMENT_NOTE (C1758-C1762):
PLACEMENT_NOTE (C1723-C1724):
Intel recommendation (Section 6.5): 10x 1uF, 8x 10uF, 1x 330uF
PLACEMENT_NOTE (C1717-C1722):
21
R1702
0.010
1%
1/4W
MF
0603
2
1
C1740
402
Place on bottom side of U1000
X5R
10V
10%
1UF
2
1
C1756
330UF-0.006OHM
20%
POLY
2V
CASE-D2-SM
2
1
C1768
330UF-0.006OHM
20%
POLY
2V
CASE-D2-SM
2
1
C1711
CRITICAL
6.3V
20%
0402-1
10UF
CERM-X5R
2
1
C1712
0402-1
CRITICAL
10UF
20%
6.3V
CERM-X5R
2
1
C1713
6.3V
CRITICAL
10UF
CERM-X5R
20%
0402-1
2
1
C1714
CRITICAL
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1715
CRITICAL
10UF
CERM-X5R
6.3V
20%
0402-1
3 2
1
C1723
470UF-4MOHM
20%
2.0V
POLY-TANT
D2T-SM
Place near inductors on bottom side.
2
1
C1716
CRITICAL
0402-1
20%
6.3V
CERM-X5R
10UF
2
1
C1748
Place close to U1000 on bottom side
10UF
20%
CERM-X5R
6.3V
0402-1
2
1
C1717
22UF
OMIT
CRITICAL
X5R-CERM-1
603
6.3V
20%
2
1
C1749
6.3V
Place close to U1000 on bottom side
10UF
CERM-X5R
20%
0402-1
2
1
C1750
20%
6.3V
10UF
Place close to U1000 on bottom side
X5R
603
2
1
C1751
Place close to U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1752
Place close to U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1753
Place close to U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1754
20%
6.3V
10UF
Place close to U1000 on bottom side
X5R
603
2
1
C1755
Place close to U1000 on bottom side
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1763
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1764
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1765
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1718
OMIT
CRITICAL
X5R-CERM-1
22UF
603
6.3V
20%
2
1
C1766
10UF
CERM-X5R
6.3V
20%
0402-1
2
1
C1767
0402-1
20%
6.3V
CERM-X5R
10UF
3 2
1
C1724
Place near inductors on bottom side.
470UF-4MOHM
D2T-SM
2.0V
20%
POLY-TANT
2
1
C1719
OMIT
CRITICAL
603
X5R-CERM-1
6.3V
20%
22UF
2
1
C1741
10V
10%
1UF
402
X5R
Place on bottom side of U1000
2
1
C1742
1UF
X5R
402
10%
10V
2
1
C1743
10V
402
1UF
10%
X5R
2
1
C1744
X5R
1UF
10%
10V
402
2
1
C1720
OMIT
CRITICAL
X5R-CERM-1
603
6.3V
20%
22UF
2
1
C1721
OMIT
CRITICAL
603
X5R-CERM-1
6.3V
20%
22UF
2
1
C1722
OMIT
CRITICAL
603
X5R-CERM-1
6.3V
20%
22UF
2
1
C1745
1UF
402
10V
X5R
10%
2
1
C1746
10%
10V
X5R
1UF
402
2
1
C1747
1UF
10%
X5R
402
10V
2
1
C1700
CRITICAL
Place on bottom side of U1000
402
10V
X5R
10%
1UF
2
1
C1701
CRITICAL
402
1UF
10V
Place on bottom side of U100.
X5R
10%
2
1
C1702
CRITICAL
X5R
402
10V
10%
1UF
Place on bottom side of U1000
2
1
C1704
CRITICAL
1UF
402
10%
X5R
10V
2
1
C1705
CRITICAL
1UF
10%
10V
402
X5R
2
1
C1706
402
CRITICAL
10V
10%
1UF
X5R
2
1
C1757
X5R
10%
10V
402
1UF
2
1
C1707
402
CRITICAL
1UF
10%
10V
X5R
2
1
C1708
CRITICAL
1UF
402
X5R
10V
10%
2
1
C1709
CRITICAL
1UF
10%
10V
X5R
402
2
1
C1758
402
X5R
10V
10%
1UF
Place on bottom side of U1000
2
1
C1759
1UF
Place on bottom side of U100.
10V
402
X5R
10%
2
1
C1760
Place on bottom side of U1000
402
10V
10%
1UF
X5R
2
1
C1761
1UF
Place on bottom side of U1000
10V
402
10%
X5R
2
1
C1762
402
1UF
10%
X5R
10V
2
1
C1710
CRITICAL
1UF
402
X5R
10%
10V
2
1
C1703
CRITICAL
10V
10%
402
1UF
X5R
Place on bottom side of U1000
2
1
C1738
1UF
10V
Place on bottom side of U1000
10%
X5R
402
2
1
C1739
1UF
402
X5R
Place on bottom side of U100.
10V
10%
C1717,C1718,C1719,C1720,C1721,C1722
6
CAP,CER,X5R,22uF,20%,6.3V,0603,SAMSUNG
138S0691 CRITICAL
SYNC_MASTER=MASTER
CPU DECOUPLING-II
SYNC_DATE=02/15/2011
=PP1V5_S3_CPU_VCCDDR
=PP1V5_S3_CPU_VCCDQ
=PPVCCSA_S0_CPU
=PPVCORE_S0_CPU_VCCAXG
051-9058
4.0.0
17 OF 109
15 OF 86
7
10 12 26
7
12
7
12
7 9
12
IN
IN
OUT
OUT
OUT
IN
BI
IN
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
IN
IN
OUT
OUT
OUT
BI
OUT
SATA3COMPI
SATA3RCOMPO
SATA0GP/GPIO21
SATA1GP/GPIO19
SATALED*
SATA3RBIAS
SATAICOMPO
SATA1RXN
SATA0TXP
SATA0TXN
SATA2RXN
SATA2RXP
SATA5RXP
SATA0RXP
LDRQ0*
RTCRST*
SRTCRST*
INTRUDER*
INTVRMEN
HDA_BCLK
HDA_SYNC
HDA_RST*
SPKR
HDA_SDIN0
HDA_SDIN1
HDA_SDIN3
HDA_SDIN2
HDA_SDO
HDA_DOCK_EN*/GPIO33
HDA_DOCK_RST*/GPIO13
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
SPI_CS0*
SPI_CLK
SPI_CS1*
SPI_MOSI
SPI_MISO
FWH0/LAD0
RTCX1
RTCX2
SATA1TXP
SATA0RXN
SERIRQ
LDRQ1*/GPIO23
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME*
SATA1RXP
SATA1TXN
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5TXN
SATA5TXP
SATAICOMPI
JTAG
SPI
SATA
LPC
IHDA
RTC
(1 OF 10)
PEG_B_CLKRQ*/GPIO56
CLKOUT_PEG_B_N
PCIECLKRQ4*/GPIO26
PCIECLKRQ3*/GPIO25
CLKOUT_PCIE4P
CLKOUT_PCIE4N
CLKOUT_PCIE3P
CLKOUT_PCIE3N
PCIECLKRQ1*/GPIO18
PCIECLKRQ2*/GPIO20
CLKOUT_PCIE2P
CLKOUT_PCIE2N
PCIECLKRQ0*/GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PERN3
PETP2
PETN2
PERP1
PETN1
PERN1
SMBCLK
SMBALERT*/GPIO11
PETP8
PERP8
PETN8
PETP7
PERN8
PETN7
PERP7
PERN7
PETN6
PETP6
PERP6
PERN6
PETP5
PETN5
PERP5
PETP4
PERN5
PETN4
PERP4
PETP3
PERN4
PETN3
PERP3
PERN2
PERP2
PETP1
SMBDATA
PCIECLKRQ5*/GPIO44
CLKOUT_PCIE5P
CLKOUT_PCIE5N
CLKOUT_PEG_B_P
PCIECLKRQ6*/GPIO45
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7*/GPIO46
CLKOUT_ITPXDP_P
CLKOUT_ITPXDP_N
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_P
CLKOUT_DP_N
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_P
CLKIN_SATA_N
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XTAL25_IN
XCLK_RCOMP
CLKOUT_PEG_A_N
PEG_A_CLKRQ*/GPIO47
CLKOUT_PEG_A_P
SML0ALERT*/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO58
SML1ALERT*/PCHHOT*/GPIO74
SML1DATA/GPIO75
CL_CLK1
CL_DATA1
CL_RST1*
C-LINK
PCI-E*
CLOCKS
CLOCKS
FLEX
SMBUS
(2 OF 10)
IN
IN
IN
IN
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
IN
OUT
OUT
BI
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
OUT
BI
BI
OUT
OUT
NC
NC
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
D
SIZE
DRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
(IPD-BOOT)
(IPD)
(IPD)
(IPD)
Controlled by PCIECLKRQ5#
DOES THIS NEED LENGTH MATCH???
(IPU/IPD)
(IPU)
(IPU)
(IPD-BOOT)
(IPU)
(IPU)
(IPD-PWROK)
(IPU/IPD)
(IPD-PWROK)
(IPD-PWROK)
(IPU)
(IPU)
(IPU-RSMRST#)
1.8V -> 1.1V
(IPD)
(IPU-RSMRST#)
(IPD-PWROK)
(IPD-PLTRST#)
Unused clock terminations for FCIM Mode
(IPU)
(IPD)
(IPD-BOOT)
VSel strap not functional (VCCVRM = 1.8V)
Connect to ENET_MEDIA_SENSE via alias if HDA = 3.3V.
If HDA = S0, must also ensure that signal cannot be high in S3.
Connect to ENET_MEDIA_SENSE via 12K R if HDA = 1.5V.
24 81
57 81
47 81
47 81
47 81
47 81
6
45 47
41 80
41 80
41 80
41 80
36 81
36 81
32 81
32 81
38 81
38 81
36 81
36 81
32 81
32 81
38 81
38 81
48 81
48 81
8
8
8
8
2
1
R1800
330K
MF
201
5%
1/20W
2
1
R1801
1M
MF
201
5%
1/20W
2
1
R1802
20K
MF
201
5%
1/20W
2
1
R1803
20K
MF
201
5%
1/20W
2
1
C1803
1UF
X5R
402
10%
10V
2
1
C1802
1UF
X5R
402
10%
10V
2
1
R1830
PLACE_NEAR=U1800.Y11:2.54mm
37.4
MF
201
1%
1/20W
2
1
R1820
10K
MF
201
5%
1/20W
2
1
R1890
PLACE_NEAR=U1800.Y47:2.54mm
90.9
MF
201
1%
1/20W
48 81
48 81
16 33
G22
T10
V4
U3
T1
Y14
T3
V5
P3
Y11
Y10
AB1
AB3
Y1
Y3
AD1
AD3
Y5
Y7
AF1
AF3
AB10
AB8
AB12
AH1
AB13
AH4
AH5
AD5
AD7
AP10
AP11
AM8
AM10
P1
AP5
AP7
AM1
AM3
V14
C20
A20
D20
K36
E36
H7
H1
K5
J3
C17
K22
L34
A36
A34
C34
G34
E34
K34
N32
C36
N34
D36
C37
B37
A38
C38
U1800
PANTHERPOINT
MOBILE
FCBGA
OMIT_TABLE
V49
V47
Y47
M16
E14
C13
G12
C8
A12
C9
H14
E12
K45
AY38
BB40
AV36
BB36
BB34
AU34
AY32
AU32
AW38
AY40
AU36
AY36
AY34
AV34
BB32
AV32
BC38
BJ40
BG38
BH37
BE36
BJ36
BF34
BJ34
BE38
BG40
BJ38
BG37
BF36
BG36
BE34
BG34
E6
M10
K12
T13
L14
L12
A8
V10
M1
J2
K49
H47
F47
K43
AB40
AB42
AB38
AB37
V37
V38
V42
V40
V46
V45
Y45
Y43
Y36
Y37
AA47
AA48
AB47
AB49
Y39
Y40
AK13
AK14
AM13
AM12
AU22
AV22
AK5
AK7
H45
BG30
BJ30
E24
G24
BE18
BF18
P10
T11
M7
U1800
OMIT_TABLE
PANTHERPOINT
MOBILE
FCBGA
16 24
23
23
23
23
21
R1840
0
MF
201
5%
1/20W
NO STUFF
21
R1841
1/20W
NO STUFF
5%
201
MF
0
21
R1872
604
MF-LF
402
1%
1/16W
2
1
R1873
1K
MF
201
1%
1/20W
24 81
24
2
1
R1832
PLACE_NEAR=U1800.AH1:2.54mm
750
MF
201
1/20W
1%
2
1
R1831
PLACE_NEAR=U1800.AB12:2.54mm
201
1%
1/20W
49.9
MF
23
23
38 81
38 81
32 81
32 81
8
81
16 32
8
81
16 39
16
16
48 81
48 81
10 78
10 78
8
8
16 80
16 80
16 80
16 80
16 80
16 80
16 80
24 80
16
41 80
41 80
41 80
41 80
16 36
8
81
8
81
33 81
33 81
16 35
21
R1876
10K
MF
201
5%
1/20W
21
R1877
4.7K
MF
201
5%
1/20W
21
R1878
1/20W
5%
201
MF
10K
21
R1834
10K
MF
201
5%
1/20W
21
R1842
10K
MF
201
5%
1/20W
21
R1869
10K
MF
201
5%
1/20W
21
R1844
10K
MF
201
5%
1/20W
21
R1845
10K
MF
201
5%
1/20W
21
R1847
10K
MF
201
5%
1/20W
12
R1814
10K
MF
201
5%
1/20W
21
R1815
10K
MF
201
5%
1/20W
21
R1843
10K
MF
201
5%
1/20W
21
R1833
10K
MF
201
5%
1/20W
21
R1879
10K
MF
201
5%
1/20W
21
R1846
10K
MF
201
5%
1/20W
21
R1853
10K
MF
201
5%
1/20W
21
R1848
10K
MF
201
5%
1/20W
16 25
16
21
R1854
10K
MF
201
5%
1/20W
21
R1855
10K
MF
201
5%
1/20W
21
R1812
33
MF
201
1/20W
PLACE_NEAR=U1800.K34:1.27mm
5%
21
R1813
33
MF
201
5%
1/20W
PLACE_NEAR=U1800.A36:1.27mm
21
R1810
33
MF
201
5%
1/20W
PLACE_NEAR=U1800.N34:1.27mm
21
R1811
33
MF
201
5%
1/20W
PLACE_NEAR=U1800.L34:1.27mm
57 81
57 81
57 81
57 81
6
45 47 81
6
45 47 81
6
45 47 81
6
45 47 81
21
R1861
33
MF
201
5%
1/20W
21
R1862
33
MF
201
5%
1/20W
21
R1863
33
MF
201
5%
1/20W
21
R1864
33
MF
201
5%
1/20W
6
45 47 81
21
R1860
33
MF
201
5%
1/20W
21
R1891
10K
MF
201
5%
1/20W
21
R1892
10K
MF
201
5%
1/20W
21
R1893
10K
201
5%
1/20W
MF
21
R1894
10K
MF
201
5%
1/20W
21
R1895
10K
MF
201
5%
1/20W
21
R1896
10K
MF
201
5%
1/20W
21
R1897
10K
MF
201
5%
1/20W
21
R1870
10K
MF
201
5%
1/20W
21
R1871
10K
MF
201
5%
1/20W
36 81
36 81
SYNC_MASTER=J31_MLB
SYNC_DATE=06/13/2011
PCH SATA/PCIe/CLK/LPC/SPI
LPC_AD_R<1>
RTC_RESET_L
TP_SATA_C_R2D_CN
=PP3V3_SUS_PCH_GPIO
=PP3V3_S0_PCH_GPIO
TP_SATA_E_R2D_CP
TP_SATA_E_R2D_CN
TP_SATA_F_D2RN
PCIE_CLK100M_ENET_P
ITPXDP_CLK100M_N
PCIE_CLK100M_ENET_N
PCH_CLK96M_DOT_P
PCH_CLK96M_DOT_N
PCH_CLK100M_SATA_P
PCH_CLK100M_SATA_N
PCIE_CLK100M_PCH_P
PCH_CLK14P3M_REFCLK
PCH_CLKIN_GNDP1
PCH_CLKIN_GNDN1
SYSCLK_CLK25M_SB_R
JTAG_DPMUXUC_TRST_L
TP_PCIE_CLK100M_PE5N
ENET_MEDIA_SENSE_RDIV
USB_EXTD_SEL_XHCI
USB_EXTB_SEL_XHCI
PCH_GPIO11
PEGCLKRQA_L_GPIO47
PEGCLKRQB_L_GPIO56
PCIECLKRQ0_L_GPIO73
PEG_CLKREQ_L
ENET_CLKREQ_L
JTAG_DPMUXUC_TRST_L
EXCARD_CLKREQ_L
AP_CLKREQ_L
FW_CLKREQ_L
SATARDRVR_EN
DP_AUXCH_ISOL
PCH_SATALED_L
PCH_SPKR
JTAG_TBT_TMS
=PP3V3_T29_PCH_GPIO
HDA_SDOUT_R
SPI_MOSI_R
PCH_CLK96M_DOT_P
=PP1V05_S0_PCH_VCCDIFFCLK
SML_PCH_1_CLK
SML_PCH_1_DATA
ITPCPU_CLK100M_P
ENET_CLKREQ_L
TP_PCIE_CLK100M_PEBP
PCIE_CLK100M_T29_N
ENET_MEDIA_SENSE_RDIV
SPI_CS0_R_L
TP_SPI_CS1_L
SPI_MISO
XDP_PCH_TMS
TP_SATA_C_D2RP
TP_SATA_D_R2D_CN
FW_CLKREQ_L
NC_PCIE_8_R2D_CN
NC_PCIE_8_D2RN
NC_PCIE_7_R2D_CP
PCIE_ENET_D2R_N
PCIE_ENET_R2D_C_P
PCH_INTVRMEN_L
LPC_FRAME_R_L
LPC_AD_R<3>
LPC_AD_R<1>
HDA_BIT_CLK
PCH_SATA3COMP
TP_SATA_E_D2RN
TP_SATA_C_D2RN
TP_HDA_SDIN2
TP_HDA_SDIN3
JTAG_TBT_TMS
PCIECLKRQ0_L_GPIO73
PCIE_CLK100M_AP_N
TP_PCIE_CLK100M_PEBN
PCH_SPKR
HDA_SDIN0
TP_HDA_SDIN1
SPI_CLK_R
XDP_PCH_TDO
=PP1V05_S0_PCH
=PP1V05_S0_PCH_VCCIO_SATA
PCH_INTRUDER_L
RTC_RESET_L
PCH_SRTCRST_L
=PPVRTC_G3_PCH
=PP3V3_S0_PCH
PEGCLKRQB_L_GPIO56
PCH_GPIO11
NC_PCIE_8_R2D_CP
NC_PCIE_8_D2RP
NC_PCIE_7_R2D_CN
NC_PCIE_7_D2RP
NC_PCIE_7_D2RN
NC_PCIE_6_R2D_CN
NC_PCIE_6_R2D_CP
NC_PCIE_6_D2RP
NC_PCIE_6_D2RN
NC_PCIE_5_R2D_CP
NC_PCIE_5_R2D_CN
NC_PCIE_5_D2RP
NC_PCIE_5_D2RN
TP_PCH_GPIO64_CLKOUTFLEX0
TP_PCH_GPIO65_CLKOUTFLEX1
TP_PCH_GPIO66_CLKOUTFLEX2
TP_PCH_GPIO67_CLKOUTFLEX3
PCH_CLKIN_GNDN1
PCH_CLKIN_GNDP1
TP_PCIE_CLK100M_PEGAN
PEGCLKRQA_L_GPIO47
TP_PCIE_CLK100M_PEGAP
TP_CLINK_CLK
TP_CLINK_DATA
TP_CLINK_RESET_L
SMBUS_PCH_CLK
SMBUS_PCH_DATA
USB_EXTB_SEL_XHCI
SML_PCH_0_CLK
SML_PCH_0_DATA
USB_EXTD_SEL_XHCI
DMI_CLK100M_CPU_N
DMI_CLK100M_CPU_P
TP_PCH_CLKOUT_DPN
TP_PCH_CLKOUT_DPP
PCIE_CLK100M_PCH_N
PCIE_CLK100M_PCH_P
PCH_CLK96M_DOT_N
PCH_CLK100M_SATA_P
PCH_CLK14P3M_REFCLK
PCH_CLK33M_PCIIN
PCIE_ENET_D2R_P
PCIE_AP_D2R_N
PCIE_AP_D2R_P
PCIE_AP_R2D_C_N
PCIE_AP_R2D_C_P
PCIE_FW_D2R_N
PCIE_FW_D2R_P
PCIE_FW_R2D_C_N
PCIE_FW_R2D_C_P
PCIE_EXCARD_D2R_N
PCIE_EXCARD_D2R_P
PCIE_EXCARD_R2D_C_N
PCIE_EXCARD_R2D_C_P
PCIE_CLK100M_FW_P
PCIE_CLK100M_FW_N
AP_CLKREQ_L
PCIE_CLK100M_EXCARD_N
PCIE_CLK100M_EXCARD_P
PEG_CLK100M_N
PEG_CLK100M_P
PEG_CLKREQ_L
PCIE_CLK100M_T29_P
TBT_CLKREQ_L
LPC_AD<0>
LPC_AD_R<3>
LPC_AD<3>
LPC_FRAME_R_L
LPC_FRAME_L
HDA_BIT_CLK_R
HDA_SYNC
HDA_RST_R_L
HDA_RST_L
LPC_AD_R<0>
TP_SATA_E_D2RP
TP_SATA_D_R2D_CP
TP_SATA_D_D2RN
TP_SATA_C_R2D_CP
PCH_SATALED_L
TBT_PWR_EN_PCH
SATA_HDD_D2R_N
SATA_HDD_D2R_P
SATA_HDD_R2D_C_N
SATA_HDD_R2D_C_P
SATA_ODD_D2R_N
SATA_ODD_D2R_P
SATA_ODD_R2D_C_N
TP_SATA_F_R2D_CN
PCH_SRTCRST_L
PCH_INTRUDER_L
PCH_INTVRMEN_L
SYSCLK_CLK25M_SB_R
SYSCLK_CLK25M_SB
ITPXDP_CLK100M_P
PCIE_CLK100M_AP_P
PCH_SATAICOMP
XDP_PCH_TDI
HDA_SDOUT_R
LPC_AD_R<2>
PCIE_ENET_R2D_C_N
PCH_CLK100M_SATA_N
TP_PCIE_CLK100M_PE5P
TP_PCIE_CLK100M_PE4P
PCH_XCLK_RCOMP
TP_PCIE_CLK100M_PE4N
EXCARD_CLKREQ_L
TP_SATA_F_D2RP
TP_SATA_F_R2D_CP
PCIE_CLK100M_PCH_N
LPC_AD_R<2>
LPC_AD_R<0>
HDA_BIT_CLK_R
TP_SATA_D_D2RP
HDA_RST_R_L
XDP_PCH_TCK
SATA_ODD_R2D_C_P
LPC_SERIRQ
TP_LPC_DREQ0_L
SYSCLK_CLK32K_RTC
TBT_CLKREQ_L
LPC_AD<2>
LPC_AD<1>
HDA_SYNC_R
PCH_SATA3RBIAS
XDP_DC3_PCH_GPIO19_SATARDRVR_EN
XDP_DC2_PCH_GPIO21_DP_AUXCH_ISOL
HDA_SYNC_R
ITPCPU_CLK100M_N
HDA_SDOUT
051-9058
4.0.0
18 OF 109
16 OF 86
16
16
6
7
17 18 19
7
17 18 19 30
6
6
6
23 78
16 80
16 80
16 80
16 80
16 80
16 80
16
16
16 81
6
16 24
16
16 25
16
16
16
16
16
16 36
16
16
16 32
16 39
23 41
23 75
16
16
16 33
7
19
16 24 81
7
20 22
10 78
6
6
6
16
16
16
16
6
6
6
6
16
6
16
6
7
22
7
20 22
16
16
16
7
17 20
7
22
16
16
6
6
6
6
16
16
16
6
6
6
16
16
16 81
16 81
16
6
6
6
6
16
6
16
16
16
16 81
23 78
80
16 24 81
16
6
6
6
6
6
16 80
16
16
16 81
6
16 81
16 35
16 81
16 81
10 78
IN
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
DMI1TXP
SUSACK*
DMI_ZCOMP
DMI0TXN
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP3
FDI_RXP1
FDI_RXP2
FDI_RXP5
FDI_RXP4
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_LSYNC0
FDI_FSYNC1
FDI_LSYNC1
DMI2TXN
DMI1TXN
DMI3TXN
DMI3TXP
FDI_RXN0
FDI_RXN1
FDI_RXN3
FDI_RXN2
FDI_RXN4
FDI_RXN5
DMI0RXN
FDI_RXP6
DMI1RXN
DMI0TXP
DMI3RXP
DMI2RXP
DMI1RXP
DMI0RXP
DMI3RXN
DMI2RXN
DMI2TXP
DMI2RBIAS
DMI_IRCOMP
SUS_STAT*/GPIO61
SLP_S4*
SLP_S5*/GPIO63
SUSCLK/GPIO62
SLP_SUS*
SLP_A*
SLP_S3*
PMSYNCH
SLP_LAN*/GPIO29
SYS_RESET*
SYS_PWROK
PWROK
APWROK
DRAMPWROK
RSMRST*
SUSWARN*/SUSPWRDNACK/GPIO30
PWRBTN*
ACPRESENT/GPIO31
BATLOW*/GPIO72
RI*
DSWVRMEN
DPWROK
WAKE*
CLKRUN*/GPIO32
SYSTEM POWER
MANAGEMENT
FDI
DMI
(3 OF 10)
LVD_VBG
DDPD_3P
DDPD_2P
DDPD_3N
DDPD_2N
DDPD_1P
DDPD_1N
DDPD_0P
DDPD_0N
DDPD_HPD
DDPD_AUXN
DDPD_AUXP
DDPD_CTRLDATA
DDPD_CTRLCLK
DDPC_3P
DDPC_3N
DDPC_2P
DDPC_2N
DDPC_0P
DDPC_1P
DDPC_1N
DDPC_0N
DDPC_HPD
DDPC_AUXN
DDPC_AUXP
DDPC_CTRLDATA
DDPC_CTRLCLK
DDPB_3P
DDPB_3N
DDPB_1P
DDPB_2P
DDPB_2N
DDPB_1N
DDPB_0P
DDPB_HPD
DDPB_0N
DDPB_AUXN
DDPB_AUXP
SDVO_CTRLCLK
SDVO_CTRLDATA
SDVO_INTP
SDVO_INTN
SDVO_STALLP
SDVO_STALLN
SDVO_TVCLKINP
SDVO_TVCLKINN
L_CTRL_CLK
DAC_IREF
CRT_IRTN
CRT_VSYNC
CRT_HSYNC
CRT_DDC_DATA
CRT_DDC_CLK
CRT_RED
CRT_GREEN
CRT_BLUE
L_VDD_EN
L_DDC_DATA
L_CTRL_DATA
LVD_IBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK
LVDSA_CLK*
LVDSA_DATA0*
LVDSA_DATA1*
LVDSA_DATA2*
LVDSA_DATA3*
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK*
LVDSB_CLK
LVDSB_DATA0*
LVDSB_DATA1*
LVDSB_DATA2*
LVDSB_DATA0
LVDSB_DATA3*
LVDSB_DATA3
LVDSB_DATA1
LVDSB_DATA2
L_DDC_CLK
L_BKLTCTL
L_BKLTEN
LVDS
(4 OF 10)
DIGITAL DISPLAY INTERFACE
CRT
OUT
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
BI
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
D
SIZE
DRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
(IPD)
(IPD)
(IPD)
(IPD)
(IPD)
(IPD)
(IPD-PLTRST#)
(IPD-PLTRST#)
(IPD-PLTRST#)
(IPD-PLTRST#)
(IPU)
(IPU)
(IPU)
(IPD-DeepS4/S5)
9
78
9
78
9
78
9
78
9
78
9
78
2
1
R1900
1/20W
1%
201
MF
49.9
PLACE_NEAR=U1800.BJ24:12.7mm
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
2
1
R1951
1/20W
5%
201
MF
1K
PLACE_NEAR=U1800.T43:2.54mm
2
1
R1920
1/20W
1%
201
MF
750
PLACE_NEAR=U1800.BH21:2.54mm
B9K3
P12
K16
N14
C12
G8
G16
D10
H4
F4
K14
G10
C21
A10
L22
E20
AP14
BH9
BJ10
BG12
BE12
BG13
BF14
BB14
BG14
BG9
BG10
BJ12
BC12
BH13
BE14
AY14
BJ14
BB10
AV14
AW16
BC10
AV12
A18
B13
E22
BJ24
BG25
AU18
AV18
BJ20
BG20
AY18
BB18
BJ18
BG18
BH21
AY20
AW20
BC20
BE20
AY24
AW24
BE24
BC24
N3
E10
L10
H20
U1800
FCBGA
MOBILE
PANTHERPOINT
OMIT_TABLE
AP45
AP43
AM40
AM42
AP40
AP39
M39
P38
AF45
AF43
AF49
AF47
AH47
AH49
AH45
AH43
AF40
AF39
AJ48
AJ47
AK47
AK49
AM47
AM49
AN48
AN47
AK39
AK40
AE47
AE48
AF36
AF37
M45
K47
T40
P39
T45
J47
P45
BH41
M36
M43
AT43
AT45
BG42
BJ42
BE42
BF42
BE44
BF44
BB45
BB43
AT38
P42
P46
AP49
AP47
BB49
BB47
BA48
BA47
AY45
AY43
AY49
AY47
AT40
AT47
AT49
AV49
AV47
AU47
AU48
AV46
AV45
AV40
AV42
T43
M49
T49
T42
M47
P49
M40
T39
N48
U1800
FCBGA
MOBILE
PANTHERPOINT
OMIT_TABLE
2
1
R1915
1/20W
5%
201
MF
390K
2
1
R1905
1/20W
5%
201
MF
10K
2 1
R1986
1/20W
5%
201
MF
0
17 73
2
1
R1909
1/20W
5%
201
MF
100K
24 45
23 24 45
10 26 78
24
24
73
17 23 45
45 46 73
46
6
17 24 32
6
17 45 47
6
45 47
46
17 45 73
6
17 26 32 45 73
6 8
17 26 45 73
10 78
45
8
8
2
1
R1950
1/20W
1%
201
MF
2.37K
PLACE_NEAR=U1800.AF37:2.54mm
8
17
8
17
8
80
8
80
8
80
8
80
8
80
8
80
8
80
8
80
8
80
8
80
74 80
74 80
8
80
6
74 80
6
74 80
6
74 80
8
80
6
74 80
6
74 80
6
74 80
8
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
9
78
12
R1923
1/20W
5%
201
MF
100K
21
R1925
1/20W
5%
201
MF
1K
21
R1991
1/20W
5%
201
MF
8.2K
21
R1985
1/20W
5%
201
MF
1K
12
R1922
1/20W
5%
201
MF
100K
12
R1921
1/20W
5% MF
100K
201
12
R1924
1/20W
5%
201
MF
100K
2
1
R1983
1/20W
5%
201
MF
10K
75
21
R1982
1/20W
5%
201
MF
10K
17
12
R1984
1/20W
5%
201
100K
MF
12
R1981
1/20W
5%
201
MF
100K
PCH DMI/FDI/PM/Graphics
SYNC_MASTER=J31_MLB
SYNC_DATE=06/13/2011
DMI_S2N_P<2>
DMI_S2N_P<3>
=PPVRTC_G3_PCH
=PP1V05_S0_PCH_VCCIO_PCIE
=PP3V3_SUS_PCH_GPIO
PCH_SUSACK_L
PM_PCH_APWROK
PM_MEM_PWRGD
PM_RSMRST_L
PCH_SUSWARN_L
PM_PWRBTN_L
FDI_FSYNC<0>
FDI_LSYNC<1>
PM_SYNC
FDI_DATA_P<1>
FDI_DATA_P<2>
FDI_DATA_P<3>
FDI_DATA_P<4>
FDI_DATA_P<0>
FDI_DATA_P<5>
FDI_DATA_P<6>
FDI_INT
FDI_DATA_P<7>
FDI_DATA_N<7>
FDI_DATA_N<6>
FDI_DATA_N<5>
FDI_DATA_N<0>
FDI_DATA_N<4>
FDI_DATA_N<3>
FDI_DATA_N<2>
FDI_DATA_N<1>
PM_CLKRUN_L
FDI_FSYNC<1>
PCH_SUSACK_L
LPC_PWRDWN_L
TP_PM_SLP_A_L
PM_SLP_S3_L
PM_SLP_S4_L
PCIE_WAKE_L
PM_SLP_S5_L
PCH_DMI_COMP
DMI_N2S_N<0>
DMI_N2S_N<1>
DMI_N2S_N<2>
DMI_N2S_N<3>
DMI_N2S_P<0>
DMI_N2S_P<3>
DMI_N2S_P<1>
DMI_N2S_P<2>
DMI_S2N_N<0>
DMI_S2N_N<1>
DMI_S2N_N<2>
DMI_S2N_P<0>
DMI_S2N_N<3>
DMI_S2N_P<1>
PCH_LVDS_IBG
TP_PCH_LVDS_VBG
TP_DP_IG_D_MLP<3>
TP_DP_IG_D_MLP<2>
TP_DP_IG_D_MLN<3>
TP_DP_IG_D_MLN<2>
TP_DP_IG_D_MLP<1>
TP_DP_IG_D_MLN<1>
TP_DP_IG_D_MLP<0>
TP_DP_IG_D_MLN<0>
TP_DP_IG_D_HPD
TP_DP_IG_D_AUXN
TP_DP_IG_D_AUXP
TP_DP_IG_D_CTRL_DATA
TP_DP_IG_D_CTRL_CLK
TP_DP_IG_C_MLP<3>
TP_DP_IG_C_MLN<3>
TP_DP_IG_C_MLP<2>
TP_DP_IG_C_MLN<2>
TP_DP_IG_C_MLP<0>
TP_DP_IG_C_MLP<1>
TP_DP_IG_C_MLN<1>
TP_DP_IG_C_MLN<0>
DPB_IG_HPD
DPB_IG_AUX_CH_N
DPB_IG_AUX_CH_P
DPB_IG_DDC_DATA
DPB_IG_DDC_CLK
TP_DP_IG_B_MLP<3>
TP_DP_IG_B_MLN<3>
TP_DP_IG_B_MLP<1>
TP_DP_IG_B_MLP<2>
TP_DP_IG_B_MLN<2>
TP_DP_IG_B_MLN<1>
TP_DP_IG_B_MLP<0>
DPA_IG_HPD
TP_DP_IG_B_MLN<0>
DPA_IG_AUX_CH_N
DPA_IG_AUX_CH_P
DPA_IG_DDC_CLK
DPA_IG_DDC_DATA
TP_SDVO_INTP
TP_SDVO_INTN
TP_SDVO_STALLN
TP_SDVO_TVCLKINP
TP_SDVO_TVCLKINN
TP_LVDS_IG_CTRL_CLK
PCH_DAC_IREF
TP_CRT_IG_VSYNC
TP_CRT_IG_HSYNC
TP_CRT_IG_DDC_DATA
TP_CRT_IG_DDC_CLK
TP_CRT_IG_RED
TP_CRT_IG_GREEN
TP_CRT_IG_BLUE
LVDS_IG_PANEL_PWR
LVDS_IG_DDC_DATA
TP_LVDS_IG_CTRL_DATA
LVDS_IG_DDC_CLK
LVDS_IG_BKL_PWM
LVDS_IG_BKL_ON
LVDS_IG_A_CLK_N
LVDS_IG_A_CLK_P
LVDS_IG_A_DATA_N<0>
LVDS_IG_A_DATA_N<1>
LVDS_IG_A_DATA_N<2>
LVDS_IG_A_DATA_P<0>
LVDS_IG_A_DATA_P<1>
LVDS_IG_A_DATA_P<2>
LVDS_IG_A_DATA_P<3>
LVDS_IG_B_CLK_N
LVDS_IG_B_DATA_N<0>
LVDS_IG_B_CLK_P
LVDS_IG_B_DATA_N<1>
LVDS_IG_B_DATA_N<2>
LVDS_IG_B_DATA_N<3>
LVDS_IG_B_DATA_P<0>
LVDS_IG_B_DATA_P<1>
LVDS_IG_B_DATA_P<2>
LVDS_IG_B_DATA_P<3>
PCH_DSWVRMEN
PCH_DMI2RBIAS
PM_PCH_PWROK
PM_PCH_SYS_PWROK
PM_SLP_SUS_L
PCH_SUSWARN_L
=PP3V3_SUS_PCH_GPIO
PM_SYSRST_L
PCH_RI_L
PM_BATLOW_L
SMC_ADAPTER_EN
FDI_LSYNC<0>
PM_DSW_PWRGD
=PP3V3_S5_PCH
=TBT_WAKE_L
GPIO29
PM_CLKRUN_L
PM_SLP_S3_L
PM_SLP_S4_L
PM_SLP_SUS_L
PM_SLP_S5_L
PM_CLK32K_SUSCLK_R
LVDS_IG_PANEL_PWR
LVDS_IG_BKL_ON
=PP3V3_S0_PCH_GPIO
=PP3V3_SUS_PCH_GPIO
MAKE_BASE=TRUE
PCIE_WAKE_L
GPIO29
PM_PWRBTN_L
TP_SDVO_STALLP
LVDS_IG_A_DATA_N<3>
051-9058
4.0.0
19 OF 109
17 OF 86
7
16 20
7
7
16 17 18 19
17
17
17
6
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
17
7
16 17 18 19
7
17
6
17 45 47
6 8
17 26 45 73
6
17 26 32 45 73
17 73
17 45 73
8
17
8
17
7
16 18 19 30
7
16 17 18 19
6
17 24 32
17 23 45
6
USB3RP4
USB3RP3
USB3RP2
USB3RP1
USB3RN1
RSVD8
RSVD9
RSVD10
RSVD12
USBP0N
USBP0P
USBP1N
USBP2N
USBP1P
USBP2P
USBP3N
USBP4N
USBP3P
USBP4P
USBP5N
USBP5P
USBP6P
USBP6N
USBP7N
USBP7P
USBP8P
USBP8N
USBP9N
USBP9P
USBP10P
USBP10N
USBP11N
USBP11P
USBP12P
USBP12N
USBP13N
USBP13P
OC0*/GPIO59
USBRBIAS*
USBRBIAS
OC1*/GPIO40
OC2*/GPIO41
OC3*/GPIO42
OC4*/GPIO43
OC5*/GPIO9
OC6*/GPIO10
OC7*/GPIO14
PIRQA*
PIRQB*
PIRQC*
REQ1*/GPIO50
PIRQD*
REQ3*/GPIO54
REQ2*/GPIO52
GNT1*/GPIO51
GNT2*/GPIO53
GNT3*/GPIO55
PIRQE*/GPIO2
PIRQF*/GPIO3
PIRQG*/GPIO4
PME*
PIRQH*/GPIO5
PLTRST*
CLKOUT_PCI0
CLKOUT_PCI2
CLKOUT_PCI1
CLKOUT_PCI4
CLKOUT_PCI3
RSVD1
TP1
TP2
RSVD2
RSVD3
TP3
TP4
RSVD4
RSVD5
TP5
TP6
RSVD6
RSVD7
TP7
TP8
TP9
TP10
RSVD11
TP11
RSVD13
TP14
RSVD14
RSVD15
TP15
TP16
RSVD16
RSVD17
TP17
TP18
RSVD18
RSVD19
TP19
TP20
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD27
RSVD26
RSVD28
RSVD29
TP13
TP12
TP23
TP22
TP21
USB3RN4
USB3RN3
USB3RN2
USB3TN2
USB3TN1
USB3TN3
USB3TN4
USB3TP1
USB3TP2
USB3TP3
USB3TP4
TP24
PCI
USB
(5 OF 10)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
BI
IN
BI
BI
BI
OUT
OUT
OUT
OUT
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
D
SIZE
DRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
Ext D (EHCI)
Unused
USB Hub (All LS/FS Devices)
Ext C (XHCI/EHCI)
Camera
RSVD: SD
RSVD: WiFi
Unused
(IPD)
(IPU)
(IPD)
Ext B (XHCI)
Ext D (XHCI) (Mobiles: Trackpad?)
Ext B (EHCI)
Ext A (XHCI/EHCI)
(IPU-PCIERST#)
Unused
RSVD: BT (HS)
Redundant to pull-up on audio page
C33
B33
E30
G30
K30
L30
M28
N28
B29
C29
A28
C28
D28
E28
H28
K28
A26
C26
B25
C25
A32
C32
E32
G32
K32
L32
A30
C30
A24
C24
AW30
AV28
AY26
AU26
AY30
AU28
BB26
AV26
BG32
BF32
BE30
BC28
BJ32
BE32
BC30
BE28
AK45
AK43
AH37
AH38
BG16
BJ16
BH25
BG46
AY16
M20
B21
AB45
BJ26
AB46
L24
K24
Y13
AM5
AM4
AH12
H3
N30
C18
BG26
AT3
AT4
AU2
BC8
AT10
BG4
AU3
BF3
AT12
BA2
AY5
AT8
AV10
AV5
BF6
BD4
BE8
AV7
BB7
BB3
BB5
BA3
BB1
AV1
AV3
AT5
AY3
AT1
AY7
E40
C44
C46
K10
C6
D44
C42
G40
G42
G38
H38
K38
K40
C14
D14
A16
L16
C16
B17
K20
A14
F46
E42
D47
H40
K42
J48
H43
H49
U1800
FCBGA
MOBILE
PANTHERPOINT
OMIT_TABLE
25 80
25 80
8
8
25 80
25 80
8
80
8
80
25 80
25 80
25 80
25 80
42 80
42 80
42 80
42 80
43 80
43 80
43 80
43 80
8
8
8
8
8
8
8
8
12
R2067
5%
201
MF
1/20W
10K
21
R2068
MF
201
5%
1/20W
10K
21
R2061
MF5%
1/20W
201
10K
21
R2062
201
5%
1/20W
MF
10K
21
R2033
1/20W
5%
201
MF
10K
NO STUFF
21
R2060
10K
MF
201
5%
1/20W
21
R2030
1/20W
5%
201
MF
10K
21
R2018
1/20W
5%
201
MF
10K
21
R2016
1/20W
5%
201
10K
MF
21
R2017
1/20W
5% MF
10K
201
21
R2014
1/20W
5%
201
MF
10K
NO STUFF
21
R2031
1/20W
201
MF
10K
5%
18
18
18
18
18 62
18 75
18 62
21
R2010
1/20W
5%
201
MF
10K
21
R2011
1/20W
5%
201
MF
10K
21
R2012
1/20W
5%
201
MF
10K
21
R2013
1/20W
5%
201
MF
10K
12
R2054
1/20W
5%
201
10K
NO STUFF
MF
21
R2069
10K
MF
201
5%
1/20W
18 23
18 23
18 23
18 23
18 23
23
23
42 80
23
42 80
32 80
32 80
2
1
R2070
1%
MF
22.6
201
1/20W
PLACE_NEAR=U1800.B33:2.54mm
24 26
24
24 81
24
PCH PCI/USB/TP/RSVD
SYNC_MASTER=J31_MLB
SYNC_DATE=06/13/2011
USB3_EXTA_RX_P
BLC_GPIO
USB_EXTD_EHCI_P
XDP_DB3_PCH_GPIO14_SDCONN_STATE_CHANGE
USB3_EXTB_TX_P
USB_EXTC_P
USB_EXTD_XHCI_N
USB_EXTD_XHCI_P
USB_EXTB_XHCI_N
USB_EXTA_P
JTAG_GMUX_TMS
BLC_I2C_MUX_SEL
USE_HDD_OOB_L
BLC_GPIO
TBT_PWR_REQ_L
TP_PCH_STRP_ESI_L
PLT_RESET_L
USB_EXTA_N
USB_EXTB_XHCI_P
TP_USB_4N
TP_USB_4P
TP_USB_SDN
TP_USB_SDP
TP_USB_WLANP
TP_USB_WLANN
USB_HUB_UP_N
USB_HUB_UP_P
USB_CAMERA_P
USB_CAMERA_N
USB_EXTB_EHCI_N
USB_EXTB_EHCI_P
USB_EXTD_EHCI_N
TP_USB_BT_HSN
TP_USB_12P
TP_USB_12N
TP_USB_13N
TP_PCH_STRP_BBS1
TP_PCH_TP23
USB3_EXTB_RX_N
USB3_EXTC_RX_N
USB3_EXTD_RX_N
USB3_EXTB_TX_N
USB3_EXTC_TX_N
USB3_EXTD_TX_P
USB3_EXTC_TX_P
JTAG_GMUX_TMS
BLC_I2C_MUX_SEL
USE_HDD_OOB_L
PCI_INTA_L
PCI_INTB_L
PCI_INTC_L
PCI_INTD_L
=PP3V3_S0_PCH_GPIO
USB3_EXTA_RX_N
USB3_EXTC_RX_P
USB3_EXTB_RX_P
USB3_EXTD_TX_N
USB3_EXTA_TX_P
USB_EXTC_N
USB3_EXTA_TX_N
LPC_CLK33M_LPCPLUS_R
PCH_CLK33M_PCIOUT
PCH_STRP_TOPBLK_SWP_L
AUD_IP_PERIPHERAL_DET
TBT_PWR_REQ_L
AUD_I2C_INT_L
TP_USB_BT_HSP
PCH_USB_RBIAS
TP_USB_13P
TP_PCI_CLK33M_OUT2
TP_PCI_PME_L
XDP_DA0_PCH_GPIO59_USB_EXTA_OC_L
XDP_DA1_PCH_GPIO40_USB_EXTB_OC_L
XDP_DA2_PCH_GPIO41_USB_EXTC_OC_L
XDP_DA3_PCH_GPIO42_USB_EXTD_OC_L
XDP_DB0_PCH_GPIO43_USB_EXTB_OC_EHCI_L
XDP_DB1_PCH_GPIO9_USB_EXTD_OC_EHCI_L
XDP_DB2_PCH_GPIO10_AP_PWR_EN
TP_PCI_CLK33M_OUT3
LPC_CLK33M_SMC_R
USB3_EXTD_RX_P
AUD_IP_PERIPHERAL_DET
XDP_DA3_PCH_GPIO42_USB_EXTD_OC_L
XDP_DA2_PCH_GPIO41_USB_EXTC_OC_L
XDP_DA1_PCH_GPIO40_USB_EXTB_OC_L
XDP_DA0_PCH_GPIO59_USB_EXTA_OC_L
XDP_DB3_PCH_GPIO14_SDCONN_STATE_CHANGE
AUD_I2C_INT_L
=PP3V3_S0_PCH_GPIO
AP_PWR_EN
=PP3V3_SUS_PCH_GPIO
=PP3V3_S3_PCH_GPIO
051-9058
4.0.0
20 OF 109
18 OF 86
18
18
18
18
18 75
7
16 17 18 19 30
80
6
6
18 62
18 23
18 23
18 23
18 23
18 23
18 62
7
16 17 18 19 30
23 32 73
7
16 17 19
7
24
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