FT232R：集成USB-UART接口与安全芯片的全面解析

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FT232R是Future Technology Devices International Ltd.推出的一款高级USB到串行UART接口集成电路设备，其设计旨在简化USB到串口的设计流程。该器件集成了时钟发生器输出、FTDI Chip-ID™安全模块以及多种接口模式，包括异步和同步位bang模式。 FT232R的核心特性包括以下几个方面： 1. **USB to UART接口**：作为主要功能，FT232R提供了一个标准的USB接口，可以方便地将电脑或嵌入式系统与外部设备（如串口打印机、传感器或工业控制器）进行通信，支持串行数据传输。 2. **可选时钟生成器输出**：该器件内置一个时钟发生器，可以输出高达48MHz的内部时钟，这对于驱动微控制器或外部逻辑电路非常有用，提升了系统的灵活性和性能。 3. **FTDI Chip-ID™安全模块**：这是FT232R的一个独特特性，通过在生产过程中烧录的唯一数字标识（即FTDI Chip-ID™），可以实现对设备的识别和安全保护。这个安全功能允许用户创建一个保护性的" dongle"，用于防止未经授权的访问或应用修改，增强应用的安全性。 4. **集成外部存储器和电源管理**：FT232R整合了外部EEPROM、时钟电路以及USB所需的电阻，减少了外部组件的需求，简化了设计，并有助于节省空间和成本。 5. **接口模式选择**：除了基本的串口通信，FT232R还支持异步和同步位bang模式，这使得它能够适应不同的通信协议和应用需求，提高了其通用性和灵活性。 FT232R是一款功能强大且易于集成的USB到串口转换器，它不仅提供了基本的数据传输功能，还引入了高级的安全措施和灵活的时钟管理，适用于各种需要USB接口转换的场合，尤其适合那些需要保护和定制化应用的客户。通过其独特的设计和特性，FT232R在市场上具有显著的竞争优势。

FT232R USB UART I.C. Datasheet Version 1.04 © Future Technology Devices International Ltd. 2005

Page 6

Serial Interface Engine (SIE) - The Serial Interface Engine (SIE) block performs the Parallel to Serial and Serial to

Parallel conversion of the USB data. In accordance to the USB 2.0 speciﬁcation, it performs bit stufﬁng / un-stufﬁng

and CRC5 / CRC16 generation / checking on the USB data stream.

USB Protocol Engine - The USB Protocol Engine manages the data stream from the device USB control endpoint. It

handles the low level USB protocol (Chapter 9) requests generated by the USB host controller and the commands for

controlling the functional parameters of the UART.

FIFO TX Buffer (128 bytes) - Data from the USB data out endpoint is stored in the FIFO TX buffer and removed from

the buffer to the UART transmit register under control of the UART FIFO controller.

FIFO RX Buffer (256 bytes) - Data from the UART receive register is stored in the FIFO RX buffer prior to being

removed by the SIE on a USB request for data from the device data in endpoint.

UART FIFO Controller - The UART FIFO controller handles the transfer of data between the FIFO RX and TX buffers

and the UART transmit and receive registers.

UART Controller with Programmable Signal Inversion and High Drive - Together with the UART FIFO Controller

the UART Controller handles the transfer of data between the FIFO RX and FIFO TX buffers and the UART transmit

and receive registers. It performs asynchronous 7 / 8 bit Parallel to Serial and Serial to Parallel conversion of the

data on the RS232 (RS422 and RS485) interface. Control signals supported by UART mode include RTS, CTS,

DSR , DTR, DCD and RI. The UART Controller also provides a transmitter enable control signal pin option (TXDEN)

to assist with interfacing to RS485 transceivers. RTS / CTS, DSR / DTR and X-On / X-Off handshaking options are

also supported. Handshaking, where required, is handled in hardware to ensure fast response times. The UART also

supports the RS232 BREAK setting and detection conditions. A new feature, programmable in the internal EEPROM

allows the UART signals to each be individually inverted. Another new EEPROM programmable feature allows a high

signal drive strength to be enabled on the UART interface and CBUS pins.

Baud Rate Generator - The Baud Rate Generator provides a x16 clock input to the UART Controller from the 48MHz

reference clock and consists of a 14 bit prescaler and 3 register bits which provide ﬁne tuning of the baud rate

(used to divide by a number plus a fraction or “sub-integer”). This determines the Baud Rate of the UART, which is

programmable from 183 baud to 3 million baud.

The FT232R supports all standard baud rates and non-standard baud rates from 300 Baud up to 3 Megabaud.

Achievable non-standard baud rates are calculated as follows -

Baud Rate = 3000000 / (n + x)

where n can be any integer between 2 and 16,384 ( = 2

) and x can be a sub-integer of the value 0, 0.125, 0.25,

0.375, 0.5, 0.625, 0.75, or 0.875. When n = 1, x = 0, i.e. baud rate divisors with values between 1 and 2 are not

possible.

This gives achievable baud rates in the range 183.1 baud to 3,000,000 baud. When a non-standard baud rate is

required simply pass the required baud rate value to the driver as normal, and the FTDI driver will calculate the

required divisor, and set the baud rate. See FTDI application note AN232B-05 for more details.

RESET Generator - The integrated Reset Generator Cell provides a reliable power-on reset to the device internal

circuitry on power up. A RESET# input pin is provided to allow other devices to reset the FT232R. RESET# can be

tied to VCCIO or left unconnected, unless it is a requirement to reset the device from external logic or an external

reset generator I.C.

Internal EEPROM - The internal EEPROM in the FT232R can be used to store USB Vendor ID (VID), Product ID

(PID), device serial number, product description string, and various other USB conﬁguration descriptors. The internal

EEPROM is also used to conﬁgure the CBUS pin functions. The device is supplied with the internal EEPROM settings

preprogrammed as described in Section 10.

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