Section number Title Page
10.5.3.7 Address Translation Service....................................................................................................466
10.5.3.7.1 No Address Translation Mode..........................................................................466
10.5.3.7.2 Window Address Translation Mode.................................................................467
10.5.3.8 OMT Access and Service.........................................................................................................469
10.5.3.8.1 No Operation Translation.................................................................................469
10.5.3.8.2 Operation Type Translation..............................................................................470
10.5.3.8.3 OMT Cache Access..........................................................................................472
10.5.3.9 Access Violation......................................................................................................................473
10.6 PAMU Initialization/Application Information.............................................................................................................473
10.6.1 System Set-Up..............................................................................................................................................473
10.6.1.1 Setting Up PAMU....................................................................................................................473
10.6.1.2 Power-On Reset.......................................................................................................................474
10.6.2 System with Multiple PAMUs ....................................................................................................................474
10.6.2.1 PAACT Locations....................................................................................................................474
10.6.2.2 OMT Locations........................................................................................................................475
10.6.2.3 Location of PAACT and OMT Data Structures.......................................................................475
10.6.3 Peer-to-Peer I/O Operations.........................................................................................................................475
10.6.4 PAMU Cache Coherency.............................................................................................................................476
10.6.5 Quiescing I/O Devices.................................................................................................................................476
10.6.5.1 Quiescing I/O Devices for Table/Entry Updates.....................................................................477
10.6.5.2 Quiescing I/O Devices for Enabling PAMU and its Caches...................................................477
10.6.6 Locality of References.................................................................................................................................477
10.6.6.1 Spatial Locality........................................................................................................................477
10.6.6.2 Temporal Locality....................................................................................................................478
10.6.7 Recovering Address Space...........................................................................................................................478
10.6.7.1 Primary PAACT Address Window..........................................................................................478
10.6.7.2 Secondary PAACT Address Window......................................................................................478
10.6.7.3 Secondary Sub-Windows and PAACEs..................................................................................478
10.6.8 Data Structure Size and Alignment..............................................................................................................479
P4080 QorIQ Multicore Communication Processor Reference Manual, Rev. 2, 05/2014
Freescale Semiconductor, Inc. 17