module s_38( Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7, A, B, C, Enable );
时间: 2024-06-03 15:07:03 浏览: 64
input Enable;
input [2:0] A, B, C;
output [7:0] Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7;
wire [7:0] temp_Y;
wire [2:0] temp_ABC;
// Multiplexer for selecting A, B, or C as input to decoder
assign temp_ABC = (Enable) ? A : (Enable) ? B : C;
// 3-to-8 decoder
decoder_3to8 d0 (temp_Y[0], temp_ABC[0], temp_ABC[1], temp_ABC[2]);
decoder_3to8 d1 (temp_Y[1], temp_ABC[0], temp_ABC[1], !temp_ABC[2]);
decoder_3to8 d2 (temp_Y[2], temp_ABC[0], !temp_ABC[1], temp_ABC[2]);
decoder_3to8 d3 (temp_Y[3], temp_ABC[0], !temp_ABC[1], !temp_ABC[2]);
decoder_3to8 d4 (temp_Y[4], !temp_ABC[0], temp_ABC[1], temp_ABC[2]);
decoder_3to8 d5 (temp_Y[5], !temp_ABC[0], temp_ABC[1], !temp_ABC[2]);
decoder_3to8 d6 (temp_Y[6], !temp_ABC[0], !temp_ABC[1], temp_ABC[2]);
decoder_3to8 d7 (temp_Y[7], !temp_ABC[0], !temp_ABC[1], !temp_ABC[2]);
// Assign outputs
assign {Y7, Y6, Y5, Y4, Y3, Y2, Y1, Y0} = temp_Y;
endmodule
// 3-to-8 Decoder module
module decoder_3to8 (Y, A, B, C);
output [7:0] Y;
input A, B, C;
assign Y[0] = !(A || B || C);
assign Y[1] = !(A || B || !C);
assign Y[2] = !(A || !B || C);
assign Y[3] = !(A || !B || !C);
assign Y[4] = !(!A || B || C);
assign Y[5] = !(!A || B || !C);
assign Y[6] = !(!A || !B || C);
assign Y[7] = !(!A || !B || !C);
endmodule
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