Can you write the code of LDPC with verilog?

Yes, I can provide an example code for LDPC encoder and decoder using Verilog. Here is an example of a regular LDPC code using the Gallager A algorithm:

module ldpc_encoder(
  input [k-1:0] data_in,
  output [n-1:0] codeword_out
);

  parameter n = 2048;
  parameter k = 1024;
  parameter m = 6;

  wire [n-k-1:0] parity_bits;
  // Generate parity bits using LDPC generator matrix
  // ...

  assign codeword_out = {data_in, parity_bits};

endmodule

module ldpc_decoder(
  input [n-1:0] received_codeword,
  output [k-1:0] decoded_data_out
);

  parameter n = 2048;
  parameter k = 1024;
  parameter m = 6;

  wire [n-k-1:0] parity_bits;
  // Extract parity bits from received codeword
  // ...

  reg [k-1:0] message;
  integer i;
  // Initialize message to all 0's
  initial begin
    for (i = 0; i < k; i = i + 1) begin
      message[i] = 0;
    end
  end

  // Decode LDPC codeword using Gallager A algorithm
  // ...
  
  assign decoded_data_out = message;

endmodule

Note that this code is just an example and does not include the actual implementation of the LDPC encoder and decoder. The implementation details will depend on the chosen LDPC code and the specific hardware platform.