deglitch verilog

deglitch verilog是一种用Verilog语言实现的消除小于1个周期的毛刺的技术。它的基本原理是通过使用两级DFF寄存器来进行打拍，当毛刺信号为高电平时使用与门，当毛刺信号为低电平时使用或门。具体的Verilog代码如下所示：

module sig_deglitch(clk,rstn,host,host_f);
input clk;
input rstn;
input host;
output host_f;
reg host_d1;
reg host_d2;
always@(posedge clk or negedge rstn) begin
if(~rstn) begin
host_d1 <= 1'b1;
host_d2 <= 1'b1;
end else begin
host_d1 <= host;
host_d2 <= host_d1;
end
end
assign host_f = host_d1 | host_d2;
endmodule

通过使用该Verilog代码，可以有效消除小于1个周期的毛刺信号。<span class="em">1</span><span class="em">2</span><span class="em">3</span>
#### 引用[.reference_title]
- *1* [Verilog消除小于1个周期的毛刺（glitch）](https://blog.csdn.net/qq_40113966/article/details/125111846)[target="_blank" data-report-click={"spm":"1018.2226.3001.9630","extra":{"utm_source":"vip_chatgpt_common_search_pc_result","utm_medium":"distribute.pc_search_result.none-task-cask-2~all~insert_cask~default-1-null.142^v93^chatsearchT3_1"}}] [.reference_item style="max-width: 50%"]
- *2* *3* [去毛刺技术,Deglitching,音标,读音,翻译,英文例句,英语词典](https://blog.csdn.net/weixin_39926588/article/details/111891636)[target="_blank" data-report-click={"spm":"1018.2226.3001.9630","extra":{"utm_source":"vip_chatgpt_common_search_pc_result","utm_medium":"distribute.pc_search_result.none-task-cask-2~all~insert_cask~default-1-null.142^v93^chatsearchT3_1"}}] [.reference_item style="max-width: 50%"]
[ .reference_list ]