Standard SPI Mode Standard SPI mode is selected when the Mode option in the Vivado IDE is set to Standard. The relevant parameters in this mode are: • Mode • Enable STARTUPE2 Primitive • Transaction Width • No. of Slaves • Frequency Ratio Send Feedback AXI Quad SPI v3.2 7 PG153 April 4, 2018 www.xilinx.com Chapter 1: Overview • Enable FIFO The properties of the core in standard SPI mode, including or excluding a FIFO, are described as: • The choice of inclusion of FIFO is based on the Enable FIFO parameter. FIFO Depth parameter is linked to Enable FIFO parameter. FIFO Depth limits the transmit and receive FIFO depth to 16 or 256 when FIFO is enabled. When FIFO is not enabled, the value of FIFO depth parameter is considered to be 0. A FIFO depth of 256 should be used because this is the most suitable depth in relation to the flash memory page size. • The valid values for the FIFO Depth option in this mode are 16 or 256 when FIFO is enabled through Enable FIFO parameter. When Enable FIFO is 0 and no FIFO is included in the core. Data transmission occurs through the single transmit and receive register. When FIFO Depth is 16 or 256, the transmit or receive FIFO is included in the design with a depth of 16 or 256 elements. The width of the transmit and receive FIFO is configured with the Transaction Width option. The AXI Quad SPI core supports continuous transfer mode. When configured as master, the transfer continues until the data is available in the transmit register/FIFO. This capability is provided in both manual and automatic slave select modes. As an example, during the page read command, the command, address, and number of data beats in the DTR must be set equal to the same number of data bytes intended to be read by the SPI memory. When the core is configured as a slave, if the slave select line (SPISEL) goes High (inactive state) during the data element transfer, the current transfer is aborted. If the slave select line goes Low, the aborted data element is transmitted again. The slave mode of the core is allowed only in the standard SPI mode.

标准SPI模式是在Vivado IDE中将Mode选项设置为Standard时选择的模式。该模式下的相关参数有：
• Mode（模式）
• Enable STARTUPE2 Primitive（启用STARTUPE2原语）
• Transaction Width（传输宽度）
• No. of Slaves（从设备数量）
• Frequency Ratio（频率比例）
• Enable FIFO（启用FIFO）

在标准SPI模式下，核心的属性包括是否包含FIFO等，具体描述如下：
• 是否包含FIFO的选择取决于Enable FIFO参数。FIFO Depth参数与Enable FIFO参数相关联。当启用FIFO时，FIFO Depth限制了传输和接收FIFO的深度为16或256。当未启用FIFO时，FIFO depth参数的值被认为是0。在与Flash存储器页面大小相关时，应使用256作为FIFO深度。
• 在这种模式下，FIFO Depth选项的有效值为16或256（仅当通过Enable FIFO参数启用FIFO时）。

当Enable FIFO为0且核心不包含FIFO时，数据传输通过单个发送和接收寄存器进行。当FIFO Depth为16或256时，设计中包含带有16或256个元素深度的发送或接收FIFO。发送和接收FIFO的宽度由Transaction Width选项进行配置。

AXI Quad SPI核支持连续传输模式。当配置为主设备时，传输将持续进行，直到发送寄存器/FIFO中的数据可用。这一功能在手动和自动从选模式下都提供。例如，在页读取命令期间，必须将命令、地址和DTR中的数据传输数量设置为与SPI存储器要读取的数据字节数相同。

当将核心配置为从设备时，如果从选线（SPISEL）在数据元素传输期间变为高电平（非活动状态），当前传输将被中止。如果从选线变为低电平，中止的数据元素将重新传输。核心的从设备模式仅允许在标准SPI模式下使用。