续写，各个模块的代码

好的，以下是各个模块的代码示例：

1. I2C总线控制器模块代码

module i2c_controller(
    input clk,
    input rst,
    input [6:0] i2c_addr,
    input [7:0] i2c_data_in,
    output [7:0] i2c_data_out,
    input i2c_scl,
    inout i2c_sda
);

// 状态机的状态定义
parameter IDLE = 0;
parameter START = 1;
parameter ADDR_WRITE = 2;
parameter ADDR_READ = 3;
parameter DATA_WRITE = 4;
parameter DATA_READ = 5;
parameter STOP = 6;

// 内部寄存器定义
reg [2:0] state, next_state;
reg [7:0] data_in, data_out;
reg [6:0] addr;
reg [2:0] bit_cnt;
reg ack;
wire scl_i;
wire sda_i;
wire sda_o;
wire sda_t;

// 常量定义
parameter SCL_PERIOD = 20; // SCL时钟的周期
parameter DATA_SETUP_TIME = 5; // 数据线准备时间
parameter DATA_HOLD_TIME = 5; // 数据线保持时间

// 声明子模块
i2c_bitgen bitgen(
    .clk(clk),
    .rst(rst),
    .period(SCL_PERIOD),
    .scl_i(scl_i),
    .scl_o(i2c_scl)
);
i2c_sda_filter sda_filter(
    .clk(clk),
    .rst(rst),
    .data_in(i2c_sda),
    .data_out(sda_i),
    .data_t(sda_t)
);
i2c_sda_driver sda_driver(
    .clk(clk),
    .rst(rst),
    .data(sda_o),
    .data_t(sda_t),
    .data_out(i2c_sda)
);

// 状态机逻辑
always @(posedge clk, posedge rst) begin
    if (rst) begin
        state <= IDLE;
        bit_cnt <= 0;
        ack <= 1;
    end else begin
        state <= next_state;
    end
end

// 状态转移逻辑
always @(*) begin
    case (state)
        IDLE: begin
            if (i2c_scl == 1 && i2c_sda == 1) begin
                next_state = START;
            end else begin
                next_state = IDLE;
            end
        end
        START: begin
            bit_cnt = 0;
            addr = {1'b0, i2c_addr[6:0], 1'b0};
            data_out = 8'b00000100;
            next_state = ADDR_WRITE;
        end
        ADDR_WRITE: begin
            data_out = addr[bit_cnt];
            next_state = DATA_WRITE;
        end
        DATA_WRITE: begin
            if (i2c_sda == 0 && i2c_scl == 1) begin
                bit_cnt = bit_cnt + 1;
                if (bit_cnt == 8) begin
                    next_state = STOP;
                end else begin
                    next_state = DATA_WRITE;
                end
            end else begin
                next_state = DATA_WRITE;
            end
        end
        STOP: begin
            bit_cnt = 0;
            addr = {1'b0, i2c_addr[6:0], 1'b1};
            data_out = 8'b00000100;
            next_state = ADDR_WRITE;
        end
        default: begin
            next_state = IDLE;
        end
    endcase
end

// 数据接收逻辑
always @(posedge i2c_scl) begin
    if (i2c_scl == 1) begin
        if (i2c_sda == 0 && bit_cnt >= 0 && bit_cnt <= 7) begin
            data_in[bit_cnt] = i2c_sda;
            bit_cnt = bit_cnt + 1;
        end else if (i2c_sda == 1 && bit_cnt == 8) begin
            ack = 1;
            next_state = IDLE;
        end else if (i2c_sda == 0 && bit_cnt == 8) begin
            ack = 0;
            next_state = DATA_READ;
        end
    end
end

// 数据发送逻辑
always @(posedge i2c_scl) begin
    if (i2c_scl == 1) begin
        if (bit_cnt >= 0 && bit_cnt <= 7) begin
            sda_o = data_out[bit_cnt];
            bit_cnt = bit_cnt + 1;
        end else if (bit_cnt == 8) begin
            sda_o = ack;
            bit_cnt = bit_cnt + 1;
        end else if (bit_cnt == 9) begin
            sda_o = 1;
            bit_cnt = 0;
        end
    end
end

endmodule

2. BME280传感器模块代码

module bme280(
    input clk,
    input rst,
    input [6:0] i2c_addr,
    output reg [15:0] temperature,
    output reg [15:0] humidity,
    output reg [23:0] pressure
);

// 常量定义
parameter BME280_ADDR = 7'h76; // BME280的I2C地址
parameter CTRL_MEAS = 8'hF4; // 控制测量寄存器的地址
parameter CONFIG = 8'hF5; // 配置寄存器的地址
parameter DATA_START = 8'hF7; // 数据寄存器的地址

// 内部寄存器定义
reg [2:0] state, next_state;
reg [7:0] data_in, data_out;
reg [6:0] addr;
reg [2:0] bit_cnt;
reg [7:0] ctrl_meas;
reg [7:0] config;
reg [15:0] t_raw, h_raw;
reg [23:0] p_raw;

// 声明子模块
i2c_controller i2c(
    .clk(clk),
    .rst(rst),
    .i2c_addr(i2c_addr),
    .i2c_data_in(data_in),
    .i2c_data_out(data_out),
    .i2c_scl(i2c_scl),
    .i2c_sda(i2c_sda)
);

// 状态机的状态定义
parameter IDLE = 0;
parameter READ_CTRL_MEAS = 1;
parameter READ_CONFIG = 2;
parameter START_MEASURE = 3;
parameter WAIT_MEASURE = 4;
parameter READ_DATA = 5;

// 状态转移逻辑
always @(state or i2c_scl or i2c_sda or t_raw or h_raw or p_raw) begin
    case (state)
        IDLE: begin
            next_state = READ_CTRL_MEAS;
        end
        READ_CTRL_MEAS: begin
            addr = CTRL_MEAS;
            bit_cnt = 0;
            data_in = 0;
            next_state = START_MEASURE;
        end
        READ_CONFIG: begin
            addr = CONFIG;
            bit_cnt = 0;
            data_in = 0;
            next_state = START_MEASURE;
        end
        START_MEASURE: begin
            data_out = addr;
            next_state = WAIT_MEASURE;
        end
        WAIT_MEASURE: begin
            if (i2c_scl == 1 && i2c_sda == 1) begin
                next_state = READ_DATA;
            end else begin
                next_state = WAIT_MEASURE;
            end
        end
        READ_DATA: begin
            if (t_raw == 0) begin
                t_raw = {data_in, 8'b00000000};
                addr = DATA_START + 1;
            end else if (h_raw == 0) begin
                h_raw = {8'b00000000, data_in};
                addr = DATA_START;
            end else if (p_raw == 0) begin
                p_raw = {data_in, 8'b00000000, 8'b00000000};
                addr = DATA_START + 2;
            end else begin
                t_raw = {data_in, t_raw[7:0]};
                h_raw = {h_raw[15:8], data_in};
                p_raw = {data_in, p_raw[15:0]};
                addr = DATA_START + 1;
            end
            bit_cnt = 0;
            data_in = 0;
            next_state = START_MEASURE;
        end
        default: begin
            next_state = ID