stm32标准库sdram例程

以下是使用STM32标准库的SDRAM例程：

#include "stm32f4xx.h"

#define SDRAM_BANK_ADDR                 ((uint32_t)0xC0000000)

void SDRAM_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct;
  FMC_SDRAM_InitTypeDef SDRAM_InitStruct;
  FMC_SDRAM_TimingTypeDef SDRAM_TimingStruct;
  uint32_t tmpr = 0;

  /* Enable FMC clock */
  RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FMC, ENABLE);

  /* Enable GPIOs clock */
  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE |
                         RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG | RCC_AHB1Periph_GPIOH |
                         RCC_AHB1Periph_GPIOI, ENABLE);

  /* Configure PC0, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PD0, PD1, PD3, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, PD0, PD1, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15 as alternate function */
  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOC, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_3 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOD, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOE, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOF, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_10;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOG, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOH, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_9 | GPIO_Pin_10;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOI, &GPIO_InitStruct);

  /* Connect TIMCLK to FMC Alternate function */
  GPIO_PinAFConfig(GPIOC, GPIO_PinSource3, GPIO_AF_FMC);

  /* Connect SDCLK to FMC Alternate function */
  GPIO_PinAFConfig(GPIOC, GPIO_PinSource0, GPIO_AF_FMC);

  /* Connect A0, A1, A2, A3, A4, A5, BA0 and BA1 to FMC Alternate function */
  GPIO_PinAFConfig(GPIOF, GPIO_PinSource0, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOF, GPIO_PinSource1, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOF, GPIO_PinSource2, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOF, GPIO_PinSource3, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOF, GPIO_PinSource4, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOF, GPIO_PinSource5, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOG, GPIO_PinSource4, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOG, GPIO_PinSource5, GPIO_AF_FMC);

  /* Connect D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14 and D15 to FMC Alternate function */
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FMC);

  /* Connect NBL0 and NBL1 to FMC Alternate function */
  GPIO_PinAFConfig(GPIOE, GPIO_PinSource0, GPIO_AF_FMC);
  GPIO_PinAFConfig(GPIOE, GPIO_PinSource1, GPIO_AF_FMC);

  /* SDRAM GPIO configuration */
  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15 | GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOB, &GPIO_InitStruct);

  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_11;
  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  GPIO_Init(GPIOF, &GPIO_InitStruct);

  /* Configure a clock configuration enable command */
  FMC_SDRAMCommandTypeDef SDRAMCommandStruct;
  SDRAMCommandStruct.FMC_CommandMode = FMC_CommandMode_CLK_Enabled;
  SDRAMCommandStruct.FMC_CommandTarget = FMC_CommandTarget_SDRAM;
  SDRAMCommandStruct.FMC_AutoRefreshNumber = 1;
  SDRAMCommandStruct.FMC_ModeRegisterDefinition = 0;
  FMC_SDRAMCmdConfig(&SDRAMCommandStruct);

  /* Configure a PALL (precharge all) command */
  SDRAMCommandStruct.FMC_CommandMode = FMC_CommandMode_PALL;
  SDRAMCommandStruct.FMC_CommandTarget = FMC_CommandTarget_SDRAM;
  SDRAMCommandStruct.FMC_AutoRefreshNumber = 1;
  SDRAMCommandStruct.FMC_ModeRegisterDefinition = 0;
  FMC_SDRAMCmdConfig(&SDRAMCommandStruct);

  /* Configure an Auto Refresh command */
  SDRAMCommandStruct.FMC_CommandMode = FMC_CommandMode_AutoRefresh;
  SDRAMCommandStruct.FMC_CommandTarget = FMC_CommandTarget_SDRAM;
  SDRAMCommandStruct.FMC_AutoRefreshNumber = 8;
  SDRAMCommandStruct.FMC_ModeRegisterDefinition = 0;
  FMC_SDRAMCmdConfig(&SDRAMCommandStruct);

  /* Configure a load Mode register command */
  SDRAMCommandStruct.FMC_CommandMode = FMC_CommandMode_LoadMode;
  SDRAMCommandStruct.FMC_CommandTarget = FMC_CommandTarget_SDRAM;
  SDRAMCommandStruct.FMC_AutoRefreshNumber = 1;
  SDRAMCommandStruct.FMC_ModeRegisterDefinition = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
                                                   SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
                                                   SDRAM_MODEREG_CAS_LATENCY_2 |
                                                   SDRAM_MODEREG_OPERATING_MODE_STANDARD |
                                                   SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
  FMC_SDRAMCmdConfig(&SDRAMCommandStruct);

  /* Configure SDRAM timing */
  SDRAM_TimingStruct.FMC_LoadToActiveDelay = 2;
  SDRAM_TimingStruct.FMC_ExitSelfRefreshDelay = 7;
  SDRAM_TimingStruct.FMC_SelfRefreshTime = 4;
  SDRAM_TimingStruct.FMC_RowCycleDelay = 7;
  SDRAM_TimingStruct.FMC_WriteRecoveryTime = 2;
  SDRAM_TimingStruct.FMC_RPDelay = 2;
  SDRAM_TimingStruct.FMC_RCDDelay = 2;
  FMC_SDRAMInitStructure.FMC_SDRAMTimingStruct = &SDRAM_TimingStruct;

  /* Configure SDRAM control configuration */
  SDRAM_InitTypeDef SDRAM_InitStruct;
  SDRAM_InitStruct.FMC_Bank = FMC_Bank2_SDRAM;
  SDRAM_InitStruct.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_8b;
  SDRAM_InitStruct.FMC_InternalBankNumber = FMC_InternalBank_Number_4;
  SDRAM_InitStruct.FMC_RowBitsNumber = FMC_RowBits_Number_12b;
  SDRAM_InitStruct.FMC_SDMemoryDataWidth = FMC_SDMemory_Width_16b;
  SDRAM_InitStruct.FMC_CASLatency = FMC_CAS_Latency_2;
  SDRAM_InitStruct.FMC_WriteProtection = FMC_Write_Protection_Disable;
  SDRAM_InitStruct.FMC_SDClockPeriod = FMC_SDClock_Period_2;
  SDRAM_InitStruct.FMC_ReadBurst = FMC_Read_Burst_Enable;
  SDRAM_InitStruct.FMC_ReadPipeDelay = FMC_ReadPipe_Delay_1;
  SDRAM_InitStruct.FMC_SDClockInitiation = FMC_SDClock_Initiation_Delay_2;
  FMC_SDRAMInitStructure.FMC_SDRAMStruct = &SDRAM_InitStruct;
  FMC_SDRAMInit(&FMC_SDRAMInitStructure);

  /* SDRAM initialization sequence */
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));
  tmpr = *(__IO uint32_t *)(SDRAM_BANK_ADDR | (0x33 << 1));

  /* Configure a load Mode register command */
  SDRAMCommandStruct.FMC_CommandMode = FMC_CommandMode_LoadMode;
  SDRAMCommandStruct.FMC_CommandTarget = FMC_CommandTarget_SDRAM;
  SDRAMCommandStruct.FMC_AutoRefreshNumber = 1;
  SDRAMCommandStruct.FMC_ModeRegisterDefinition = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
                                                   SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
                                                   SDRAM_MODEREG_CAS_LATENCY_2 |
                                                   SDRAM_MODEREG_OPERATING_MODE_STANDARD |
                                                   SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
  FMC_SDRAMCmdConfig(&SDRAMCommandStruct);
}

int main(void)
{
  /* Initialize SDRAM */
  SDRAM_Init();

  /* SDRAM test */
  uint32_t *sdram_ptr = (uint32_t *)SDRAM_BANK_ADDR;
  for (uint32_t i = 0; i < 0x100000; i++)
  {
    sdram_ptr[i] = i;
  }

  while (1)
  {
  }
}

这个例程初始化了SDRAM并进行了一次写入测试。你需要根据你的具体硬件配置做出一些修改，比如引脚配置和时序配置。