module jfq_605( input [7:0] A, input [7:0] B, output reg [15:0] P ); integer i, j; always @(*) begin P = 0; for (i = 0; i < 8; i = i + 1) begin for (j = 0; j < 8; j = j + 1) begin if (i + j <= 7) begin P[i+j] = P[i+j] + A[i] * B[j]; end end end end endmodule 写出这段代码的测试文件

下面是这段代码的测试文件示例：

`timescale 1ns/1ps

module jfq_605_tb;

  reg [7:0] A;
  reg [7:0] B;
  wire [15:0] P;

  jfq_605 dut (
    .A(A),
    .B(B),
    .P(P)
  );

  initial begin
    $dumpfile("jfq_605_tb.vcd");
    $dumpvars(0, jfq_605_tb);
    $display("A\tB\tP");
    A = 8'h00;
    B = 8'h00;
    #10;
    A = 8'h01;
    B = 8'h01;
    #10;
    A = 8'h02;
    B = 8'h02;
    #10;
    A = 8'h03;
    B = 8'h03;
    #10;
    A = 8'h04;
    B = 8'h04;
    #10;
    A = 8'h05;
    B = 8'h05;
    #10;
    A = 8'h06;
    B = 8'h06;
    #10;
    A = 8'h07;
    B = 8'h07;
    #10;
    A = 8'h08;
    B = 8'h08;
    #10;
    A = 8'h09;
    B = 8'h09;
    #10;
    $finish;
  end

endmodule

这个测试文件会对 `jfq_605` 模块进行功能仿真测试，测试时逐个赋值给输入端口 `A` 和 `B`，并观察输出端口 `P` 的值是否符合预期。测试完成后，会输出仿真波形文件 `jfq_605_tb.vcd`。