VHDL八位七段数码管轮流显示0到9

非常感谢您的提问！以下是VHDL八位七段数码管轮流显示0到9的代码：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity eight_digit_display is
    Port ( clk : in  STD_LOGIC;
           reset : in  STD_LOGIC;
           data : in  STD_LOGIC_VECTOR (3 downto 0);
           seg : out  STD_LOGIC_VECTOR (6 downto 0);
           an : out  STD_LOGIC_VECTOR (7 downto 0));
end eight_digit_display;

architecture Behavioral of eight_digit_display is

    signal count : integer range 0 to 7 := 0;
    signal display : STD_LOGIC_VECTOR (3 downto 0) := "0000";
    signal an_count : integer range 0 to 7 := 0;

begin

    process (clk, reset)
    begin
        if reset = '1' then
            count <= 0;
            display <= "0000";
            an_count <= 0;
        elsif rising_edge(clk) then
            if count = 7 then
                count <= 0;
            else
                count <= count + 1;
            end if;
            case count is
                when 0 => display <= "0000";
                when 1 => display <= "0001";
                when 2 => display <= "0010";
                when 3 => display <= "0011";
                when 4 => display <= "0100";
                when 5 => display <= "0101";
                when 6 => display <= "0110";
                when 7 => display <= "0111";
            end case;
            if an_count = 7 then
                an_count <= 0;
            else
                an_count <= an_count + 1;
            end if;
        end if;
    end process;

    process (display, an_count)
    begin
        case an_count is
            when 0 => an <= "11111110";
            when 1 => an <= "11111101";
            when 2 => an <= "11111011";
            when 3 => an <= "11110111";
            when 4 => an <= "11101111";
            when 5 => an <= "11011111";
            when 6 => an <= "10111111";
            when 7 => an <= "01111111";
        end case;
        case display is
            when "0000" => seg <= "0000001"; -- 0
            when "0001" => seg <= "1001111"; -- 1
            when "0010" => seg <= "0010010"; -- 2
            when "0011" => seg <= "0000110"; -- 3
            when "0100" => seg <= "1001100"; -- 4
            when "0101" => seg <= "0100100"; -- 5
            when "0110" => seg <= "0100000"; -- 6
            when "0111" => seg <= "0001111"; -- 7
            when "1000" => seg <= "0000000"; -- 8
            when "1001" => seg <= "0000100"; -- 9
            when others => seg <= "1111111"; -- off
        end case;
    end process;

end Behavioral;

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