用 verilog 写一个模糊pid
时间: 2023-07-01 13:09:28 浏览: 100
这是一个简单的模糊PID的Verilog实现,包含了三个模糊控制器:误差、误差变化率和输出变化率。
```
module fuzzy_pid(
input clk,
input signed [15:0] err,
output signed [15:0] out
);
// 定义模糊控制器的输入和输出
reg [2:0] err_fuzzy_out;
reg [2:0] delta_err_fuzzy_out;
reg [2:0] delta_out_fuzzy_out;
reg signed [15:0] last_err;
reg signed [15:0] last_out;
// 模糊控制器的规则
// 误差模糊控制器规则
always @(err) begin
if (err <= -512) begin
err_fuzzy_out <= 0;
end else if (err <= -256) begin
err_fuzzy_out <= 1;
end else if (err <= 0) begin
err_fuzzy_out <= 2;
end else if (err <= 256) begin
err_fuzzy_out <= 3;
end else begin
err_fuzzy_out <= 4;
end
end
// 误差变化率模糊控制器规则
always @(err) begin
if (err - last_err <= -256) begin
delta_err_fuzzy_out <= 0;
end else if (err - last_err <= -128) begin
delta_err_fuzzy_out <= 1;
end else if (err - last_err <= 0) begin
delta_err_fuzzy_out <= 2;
end else if (err - last_err <= 128) begin
delta_err_fuzzy_out <= 3;
end else begin
delta_err_fuzzy_out <= 4;
end
last_err <= err;
end
// 输出变化率模糊控制器规则
always @(out) begin
if (out - last_out <= -256) begin
delta_out_fuzzy_out <= 0;
end else if (out - last_out <= -128) begin
delta_out_fuzzy_out <= 1;
end else if (out - last_out <= 0) begin
delta_out_fuzzy_out <= 2;
end else if (out - last_out <= 128) begin
delta_out_fuzzy_out <= 3;
end else begin
delta_out_fuzzy_out <= 4;
end
last_out <= out;
end
// 模糊PID的输出计算
always @(posedge clk) begin
case ({delta_err_fuzzy_out, err_fuzzy_out, delta_out_fuzzy_out})
// 模糊规则 1
3'b000: out <= out + 1;
3'b001: out <= out + 2;
3'b002: out <= out + 3;
3'b003: out <= out + 4;
3'b004: out <= out + 5;
// 模糊规则 2
3'b010: out <= out + 1;
3'b011: out <= out + 2;
3'b012: out <= out + 3;
3'b013: out <= out + 4;
3'b014: out <= out + 5;
// 模糊规则 3
3'b020: out <= out + 1;
3'b021: out <= out + 2;
3'b022: out <= out + 3;
3'b023: out <= out + 4;
3'b024: out <= out + 5;
// 模糊规则 4
3'b030: out <= out + 1;
3'b031: out <= out + 2;
3'b032: out <= out + 3;
3'b033: out <= out + 4;
3'b034: out <= out + 5;
// 模糊规则 5
3'b040: out <= out + 1;
3'b041: out <= out + 2;
3'b042: out <= out + 3;
3'b043: out <= out + 4;
3'b044: out <= out + 5;
// 模糊规则 6
3'b100: out <= out + 1;
3'b101: out <= out + 2;
3'b102: out <= out + 3;
3'b103: out <= out + 4;
3'b104: out <= out + 5;
// 模糊规则 7
3'b110: out <= out;
3'b111: out <= out;
3'b112: out <= out;
3'b113: out <= out;
3'b114: out <= out;
// 模糊规则 8
3'b120: out <= out - 1;
3'b121: out <= out - 2;
3'b122: out <= out - 3;
3'b123: out <= out - 4;
3'b124: out <= out - 5;
// 模糊规则 9
3'b130: out <= out - 1;
3'b131: out <= out - 2;
3'b132: out <= out - 3;
3'b133: out <= out - 4;
3'b134: out <= out - 5;
// 模糊规则 10
3'b140: out <= out - 1;
3'b141: out <= out - 2;
3'b142: out <= out - 3;
3'b143: out <= out - 4;
3'b144: out <= out - 5;
default: out <= out;
endcase
end
endmodule
```
这个模糊PID的实现比较简单,只有三个模糊控制器和十个规则。如果需要更精细的控制,可以增加更多的模糊控制器和规则。同时,需要注意的是,模糊控制器的输入和输出需要进行归一化处理,使得输入和输出都在[0,1]的范围内。