优化下面代码:switch (timer_priv->timeridx) { case 1: tempreg = readl(timer_priv->base + TIMER_CCR_CONTROL_C1); tempreg |= CCR_RST_ENABLE; writel(tempreg, timer_priv->base + TIMER_CCR_CONTROL_C1); tempreg = readl(timer_priv->base + TIMER_IER_C1); tempreg &= ~(IER_EVNT_ENABLE | IER_ITRV_ENABLE | IER_M1_ENABLE | IER_M2_ENABLE | IER_M3_ENABLE); writel(tempreg, timer_priv->base + TIMER_IER_C1); if (timer_priv->idx == 0) { timer_priv->irq = C_TTC0_TIMER0_IRQn; request_irq(C_TTC0_TIMER0_IRQn, itcs_timer_irq, "itcs_timer_irq01", timer_priv); } else { timer_priv->irq = C_TTC1_TIMER0_IRQn; request_irq(C_TTC1_TIMER0_IRQn, itcs_timer_irq, "itcs_timer_irq11", timer_priv); } break; case 2: tempreg = readl(timer_priv->base + TIMER_CCR_CONTROL_C2); tempreg |= CCR_RST_ENABLE; writel(tempreg, timer_priv->base + TIMER_CCR_CONTROL_C2); tempreg = readl(timer_priv->base + TIMER_IER_C2); tempreg &= ~(IER_EVNT_ENABLE | IER_ITRV_ENABLE | IER_M1_ENABLE | IER_M2_ENABLE | IER_M3_ENABLE); writel(tempreg, timer_priv->base + TIMER_IER_C2); if (timer_priv->idx == 0) { timer_priv->irq = C_TTC0_TIMER1_IRQn; request_irq(C_TTC0_TIMER1_IRQn, itcs_timer_irq, "itcs_timer_irq02", timer_priv); } else { timer_priv->irq = C_TTC1_TIMER1_IRQn; request_irq(C_TTC1_TIMER1_IRQn, itcs_timer_irq, "itcs_timer_irq12", timer_priv); } break;
时间: 2023-03-07 07:07:16 浏览: 127
优化代码
试着把代码改写成:tempreg = readl(timer_priv->base + TIMER_CCR_CONTROL_C1); tempreg |= CCR_RST_ENABLE; writel(tempreg, timer_priv->base + TIMER_CCR_CONTROL_C1); tempreg = readl(timer_priv->base + TIMER_IER_C1); tempreg |= IER_ENABLE; writel(tempreg, timer_priv->base + TIMER_IER_C1); switch (timer_priv->timeridx) { case 1: break; }
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