PCI Express M.2 接口规范V1.1详解

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"PCI Express M.2 Specification Revision 1.1" PCI Express（PCIe）M.2 是一种高速接口标准，用于连接计算机系统中的外部设备，尤其是存储设备，如固态硬盘（SSD）。该规范的修订版1.1发布于2016年3月7日，由PCI特殊兴趣组（PCI-SIG）制定并发布。PCI-SIG是一家由行业领先的公司组成的组织，负责定义和维护PCI接口标准。 PCIe M.2 接口规范主要关注以下几个方面： 1. **接口设计**：M.2接口设计紧凑，适应现代计算机对空间效率的需求，适用于轻薄型笔记本电脑和超极本等设备。它提供了比传统SATA接口更高的数据传输速率，支持PCIe x2和x4通道，其中x4通道可提供高达32GBps的理论带宽（基于PCIe 3.0标准，4 lanes x 8GT/s x 2 bytes/transfer）。 2. **模块化**：M.2 设备采用模块化设计，具有多种尺寸（如22mm x 30mm、22mm x 42mm、22mm x 60mm等），允许制造商根据设备类型和应用需求进行定制。 3. **兼容性**：M.2 接口不仅支持PCIe协议，还兼容旧有的USB、SATA等接口，通过适配器可以实现与其他接口的互换，增强了设备的兼容性和可升级性。 4. **功能扩展**：除了存储设备，M.2 接口还可用于无线网络卡、蓝牙模块、甚至Thunderbolt接口等其他扩展功能，增加了主板上的扩展能力。 5. **协议栈**：PCIe M.2 规范定义了从物理层到应用层的完整协议栈，包括电气、机械、热管理以及功能定义等，确保设备的稳定运行和互操作性。 6. **错误处理与管理**：规范中包含了错误报告和处理机制，如CRC校验、错误恢复和中断处理，以确保数据传输的可靠性。 7. **更新与支持**：尽管提供的文档是Revision 1.1版本，用户应通过PCI-SIG官网获取最新版本的规范，以获取最新的技术更新和修正。请注意，PCI-SIG在提供此规格书时明确声明不承担任何责任，包括但不限于商品性、非侵权性、特定用途适用性的保证，并且不就使用本规格书中的信息可能导致的任何侵犯知识产权承担责任。此外，该规范的使用并不意味着授予任何知识产权许可。 PCI Express M.2 接口规范是现代计算机硬件设计的关键组成部分，为高速存储和其他扩展设备提供了高效、灵活的连接方案。随着技术的发展，PCIe M.2 接口在不断提升速度和功能的同时，也推动了个人计算机性能的提升。

PCI Express M.2 Specification

PCI Express M.2 Specification | 16

Revision 1.1, March 7, 2016

List of Tables

Table 1. Optional Module Configurations............................................................................................. 27

Table 2. General Tolerance ................................................................................................................. 28

Table 3. Key Location/Pin Block Dimensions for Keys A - F ............................................................... 42

Table 4. Key Location/Pin Block Dimensions for Keys G - M .............................................................. 42

Table 5. RF Connector Physical Characteristics ................................................................................. 65

Table 6. RF Connector Mechanical Requirements .............................................................................. 65

Table 7. RF Connector Electrical Requirements ................................................................................. 66

Table 8. RF Connector Environmental Requirements ......................................................................... 66

Table 9. Recommended Antenna Function Allocation Table............................................................... 67

Table 10. Connector/Module Type Supported Matrix ............................................................................ 70

Table 11. Connector Physical Requirements......................................................................................... 71

Table 12. Connector Environmental Requirements ............................................................................... 72

Table 13. Connector Electrical Requirements ....................................................................................... 72

Table 14. Stand-off Height Descriptor Table.......................................................................................... 94

Table 15. Socket 1 System Interface Signals and Voltage Table ........................................................ 102

Table 16. Power-up CLKREQ# Timings .............................................................................................. 109

Table 17. Power-up Timing Variables .................................................................................................. 111

Table 18. DP_MLDIR Pin Termination ................................................................................................. 113

Table 19. SDIO Reset and Power-up Timing....................................................................................... 114

Table 20. Simple Indicator Protocol for LED States ............................................................................ 120

Table 21. Radio Operational States ..................................................................................................... 121

Table 22. SDIO Based Module Solution Pinouts (Module Key E) ....................................................... 123

Table 23. Display Port Based Module Solution Pinouts (Module Key A) ............................................ 124

Table 24. Socket 1 Module Pinouts (Module Key A-E) ........................................................................ 125

Table 25. Socket 2 System Interface Signal Table .............................................................................. 129

Table 26. GPIO Pin Function Assignment per Port Configuration ....................................................... 138

Table 27. Audio Pin Mode and Function Assignment .......................................................................... 140

Table 28. Antenna Control Pin Mode and Function Assignment ......................................................... 141

Table 29. Socket 2 Module Configuration ............................................................................................ 143

Table 30. Socket 2 Key B SSIC-based WWAN Module Pinouts ......................................................... 145

Table 31. Socket 2 Key B USB3.0-based WWAN Module Pinout ....................................................... 146

Table 32. Socket 2 Key B PCIe-based WWAN Module Pinout ........................................................... 147

Table 33. Socket 2 Key B-M SATA-based SSD Module Pinout .......................................................... 148

Table 34. Socket 2 Key B-M PCIe-based SSD Module Pinout............................................................ 149

Table 35. Socket 2 Key C WWAN Module Pinout ............................................................................... 150

PCI Express M.2 Specification

PCI Express M.2 Specification | 17

Revision 1.1, March 7, 2016

Table 36. Socket 3 System Interface Signal Table .............................................................................. 151

Table 37. Socket 3 SATA-based Module Pinouts (Module Key M) ..................................................... 154

Table 38. Socket 3 PCIe-based Module Pinouts (Module Key M)....................................................... 155

Table 39. BGA SSD System Interface Signal Table ............................................................................ 156

Table 40. DC Specification for 3.3 V Logic Signaling .......................................................................... 163

Table 41. DC Specification for 1.8 V Logic Signaling .......................................................................... 164

Table 42. Power Ramp Timing ............................................................................................................ 166

Table 43. Power Rail Slew Rate .......................................................................................................... 167

Table 44. Key Regulated Power Rail Parameters ............................................................................... 168

Table 45. Key VBAT Power Rail Parameters ...................................................................................... 168

Table 46. Power Rating Table for M.2 Modules with Connectors........................................................ 169

Table 47. Mechanical Key Assignments .............................................................................................. 171

Table 48. Socket 1 Versions ................................................................................................................ 172

Table 49. Display Port Based Socket 1 Pinout Diagram (Mechanical Key A) On Platform ................ 174

Table 50. SDIO Based Socket 1 Pinout Diagram (Mechanical Key E) On Platform ........................... 176

Table 51. Socket 2 Module Configuration Table .................................................................................. 178

Table 52. Socket 2 Pinouts Diagram (Mechanical Key B) On Platform ............................................... 180

Table 53. Socket 2 Pinout Diagram (Mechanical Key C) on Platform ................................................. 182

Table 54. Socket 3 SSD Pinout (Mechanical Key M) On Platform ...................................................... 183

Table 55. Signal Integrity Requirements and Test Procedures for M.2 ............................................... 193

Table 56. Example of Prepared Wire with Plug, Unit: mΩ ................................................................... 205

Table 57. Contact Resistance for the Sample Wires/Plugs, Unit: mΩ ................................................. 206

Table 58. Assumptions for Typical Components and Dissipation........................................................ 207

Table 59. Maximum Dissipation for WWAN Modules .......................................................................... 208

Table 60. Generic Assumptions for Package Designations and Types Expected to

Populate Modules ................................................................................................................ 208

Table 61. Assumptions for Generic System Environments ................................................................. 209

Table 62. Slot Definitions, Systems with Fans ..................................................................................... 210

Table 63. Slot Definitions, Systems without Fans ................................................................................ 210

Table 64. Example Use Case Applicable to Modules for Notebooks .................................................. 213

Table 65. Thermal Design Power Response – Notebook Category .................................................... 217

Table 66. Skin Temperature Limit Assumptions, Notebook ................................................................. 217

Table 67. Skin Temperature Effect of Module Position ....................................................................... 218

Table 68. Use Cases Applicable to Modules for Thin Platform Notebook with Fan ........................... 218

Table 69. Thermal Design Power Response – Thin Platform Notebook with Fan Category ............... 223

Table 70. Skin temperature limit assumptions, Thin platform notebook with Fan ............................... 223

Table 71. Use Cases Applicable to Modules for Tablet without Fan ................................................... 224

Table 72. Thermal Design Power Response—Tablet Category .......................................................... 227

Table 73. Skin Temperature Limit Assumptions, Tablet without Fan .................................................. 228

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