PCI Express M.2规格1.1版：2016年3月更新

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PCI Express (PCIe) M.2 Specification Revision 1.1是于2016年3月7日发布的标准，由PCI-SIG（PCI Special Interest Group）制定，它规范了M.2接口在现代计算机系统中的高速数据传输和扩展功能。M.2接口是一种紧凑型模块化接口设计，广泛应用于固态硬盘（SSD）、网卡、无线适配器等设备，以替代传统的PCI Express x4或x8插槽。该规格的主要内容包括但不限于以下几点： 1. **接口类型与尺寸**：M.2支持多种类型，如M.2 Type 1、Type 2、Type 3（带有散热片）以及Type M（用于移动设备），尺寸从22mm x 30mm到2280mm x 110mm不等，旨在提供更小的体积和更好的散热性能。 2. **物理连接**：M.2采用单面或双面直立式设计，通过PCIe针脚连接，提供更高的带宽，如Gen1（2.5 GT/s）、Gen2（5 GT/s）、Gen3（8 GT/s）和Gen4（16 GT/s）等不同速度等级。 3. **电气规范**：定义了信号线路上的电压、频率和信号质量要求，确保数据传输的稳定性和可靠性。 4. **热插拔和错误检测**：M.2支持热插拔功能，允许在系统运行时更换设备，同时包含错误检测机制，保障数据安全。 5. **电源管理**：规定了电源管理和功率消耗的控制，有助于节能和系统稳定性。 6. **兼容性与认证**：PCI-SIG负责规范的维护和更新，用户在采用M.2技术时需确保遵循最新的规范版本，以便设备间的互操作性。如果遇到任何疑问或需要最新版本，可通过PCI-SIG的官方网站（www.pcisig.com）获取技术支持。 7. **法律责任声明**：PCI-SIG对本规范的使用及其中信息不负任何责任，也不承诺对文档中的错误进行修正，同时强调对于侵犯知识产权的行为不承担责任。在使用规范时，用户应自行承担相应的法律风险。 PCI Express M.2 Specification Rev1.1是现代计算机硬件设计的关键参考，为构建高性能、紧凑型和灵活的系统架构提供了标准化的指导。随着技术的发展，后续的修订版可能会引入更多功能和改进，以适应不断变化的市场需求。

PCI Express M.2 Specification

PCI Express M.2 Specification | 16

Revision 1.1, March 7, 2016

List of Tables

Table 1. Optional Module Configurations............................................................................................. 27

Table 2. General Tolerance ................................................................................................................. 28

Table 3. Key Location/Pin Block Dimensions for Keys A - F ............................................................... 42

Table 4. Key Location/Pin Block Dimensions for Keys G - M .............................................................. 42

Table 5. RF Connector Physical Characteristics ................................................................................. 65

Table 6. RF Connector Mechanical Requirements .............................................................................. 65

Table 7. RF Connector Electrical Requirements ................................................................................. 66

Table 8. RF Connector Environmental Requirements ......................................................................... 66

Table 9. Recommended Antenna Function Allocation Table............................................................... 67

Table 10. Connector/Module Type Supported Matrix ............................................................................ 70

Table 11. Connector Physical Requirements......................................................................................... 71

Table 12. Connector Environmental Requirements ............................................................................... 72

Table 13. Connector Electrical Requirements ....................................................................................... 72

Table 14. Stand-off Height Descriptor Table.......................................................................................... 94

Table 15. Socket 1 System Interface Signals and Voltage Table ........................................................ 102

Table 16. Power-up CLKREQ# Timings .............................................................................................. 109

Table 17. Power-up Timing Variables .................................................................................................. 111

Table 18. DP_MLDIR Pin Termination ................................................................................................. 113

Table 19. SDIO Reset and Power-up Timing....................................................................................... 114

Table 20. Simple Indicator Protocol for LED States ............................................................................ 120

Table 21. Radio Operational States ..................................................................................................... 121

Table 22. SDIO Based Module Solution Pinouts (Module Key E) ....................................................... 123

Table 23. Display Port Based Module Solution Pinouts (Module Key A) ............................................ 124

Table 24. Socket 1 Module Pinouts (Module Key A-E) ........................................................................ 125

Table 25. Socket 2 System Interface Signal Table .............................................................................. 129

Table 26. GPIO Pin Function Assignment per Port Configuration ....................................................... 138

Table 27. Audio Pin Mode and Function Assignment .......................................................................... 140

Table 28. Antenna Control Pin Mode and Function Assignment ......................................................... 141

Table 29. Socket 2 Module Configuration ............................................................................................ 143

Table 30. Socket 2 Key B SSIC-based WWAN Module Pinouts ......................................................... 145

Table 31. Socket 2 Key B USB3.0-based WWAN Module Pinout ....................................................... 146

Table 32. Socket 2 Key B PCIe-based WWAN Module Pinout ........................................................... 147

Table 33. Socket 2 Key B-M SATA-based SSD Module Pinout .......................................................... 148

Table 34. Socket 2 Key B-M PCIe-based SSD Module Pinout............................................................ 149

Table 35. Socket 2 Key C WWAN Module Pinout ............................................................................... 150

PCI Express M.2 Specification

PCI Express M.2 Specification | 17

Revision 1.1, March 7, 2016

Table 36. Socket 3 System Interface Signal Table .............................................................................. 151

Table 37. Socket 3 SATA-based Module Pinouts (Module Key M) ..................................................... 154

Table 38. Socket 3 PCIe-based Module Pinouts (Module Key M)....................................................... 155

Table 39. BGA SSD System Interface Signal Table ............................................................................ 156

Table 40. DC Specification for 3.3 V Logic Signaling .......................................................................... 163

Table 41. DC Specification for 1.8 V Logic Signaling .......................................................................... 164

Table 42. Power Ramp Timing ............................................................................................................ 166

Table 43. Power Rail Slew Rate .......................................................................................................... 167

Table 44. Key Regulated Power Rail Parameters ............................................................................... 168

Table 45. Key VBAT Power Rail Parameters ...................................................................................... 168

Table 46. Power Rating Table for M.2 Modules with Connectors........................................................ 169

Table 47. Mechanical Key Assignments .............................................................................................. 171

Table 48. Socket 1 Versions ................................................................................................................ 172

Table 49. Display Port Based Socket 1 Pinout Diagram (Mechanical Key A) On Platform ................ 174

Table 50. SDIO Based Socket 1 Pinout Diagram (Mechanical Key E) On Platform ........................... 176

Table 51. Socket 2 Module Configuration Table .................................................................................. 178

Table 52. Socket 2 Pinouts Diagram (Mechanical Key B) On Platform ............................................... 180

Table 53. Socket 2 Pinout Diagram (Mechanical Key C) on Platform ................................................. 182

Table 54. Socket 3 SSD Pinout (Mechanical Key M) On Platform ...................................................... 183

Table 55. Signal Integrity Requirements and Test Procedures for M.2 ............................................... 193

Table 56. Example of Prepared Wire with Plug, Unit: mΩ ................................................................... 205

Table 57. Contact Resistance for the Sample Wires/Plugs, Unit: mΩ ................................................. 206

Table 58. Assumptions for Typical Components and Dissipation........................................................ 207

Table 59. Maximum Dissipation for WWAN Modules .......................................................................... 208

Table 60. Generic Assumptions for Package Designations and Types Expected to

Populate Modules ................................................................................................................ 208

Table 61. Assumptions for Generic System Environments ................................................................. 209

Table 62. Slot Definitions, Systems with Fans ..................................................................................... 210

Table 63. Slot Definitions, Systems without Fans ................................................................................ 210

Table 64. Example Use Case Applicable to Modules for Notebooks .................................................. 213

Table 65. Thermal Design Power Response – Notebook Category .................................................... 217

Table 66. Skin Temperature Limit Assumptions, Notebook ................................................................. 217

Table 67. Skin Temperature Effect of Module Position ....................................................................... 218

Table 68. Use Cases Applicable to Modules for Thin Platform Notebook with Fan ........................... 218

Table 69. Thermal Design Power Response – Thin Platform Notebook with Fan Category ............... 223

Table 70. Skin temperature limit assumptions, Thin platform notebook with Fan ............................... 223

Table 71. Use Cases Applicable to Modules for Tablet without Fan ................................................... 224

Table 72. Thermal Design Power Response—Tablet Category .......................................................... 227

Table 73. Skin Temperature Limit Assumptions, Tablet without Fan .................................................. 228

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