Designs of 3D Mesh and Torus Optical Network-on-Chips:
Topology, Optical Router and Routing Module
Lei Guo
1, 2
,Weigang Hou
*,1, 2
, Pengxing Guo
1
Key laboratory of Medical Image Computing of Northeastern University, Ministry of Education, Shenyang 110819, China
2
School of Computer Science and Engineering, Northeastern University, Shenyang 110819, China
The corresponding author, email: houweigang@cse.neu.edu.cn
Abstract: As a nanometer-level interconnection, the
Optical Network-on-Chip (ONoC) was proposed since
it was typically characterized by low latency, high
bandwidth and power efficiency. Compared with a
2-Dimensional (2D) design, the 3D integration has the
higher packing density and the shorter wire length.
Therefore, the 3D ONoC will have the great potential
in the future. In this paper, we first discuss the existing
ONoC researches, and then design mesh and torus
ONoCs from the perspectives of topology, router, and
routing module, with the help of 3D integration. A
simulation platform is established by using OPNET to
compare the performance of 2D and 3D ONoCs in
terms of average delay and packet loss rate. The
performance comparison between 3D mesh and 3D
torus ONoCs is also conducted. The simulation results
demonstrate that 3D integration has the advantage of
reducing average delay and packet loss rate, and 3D
torus ONoC has the better performance compared
with 3D mesh solution. Finally, we summarize some
future challenges with possible solutions, including
microcosmic routing inside optical routers and
highly-efficient traffic grooming.
Key words: Optical Network-on-Chip; Topology and
optical router; Routing module
I. INTRODUCTION
The future System-on-Chip (SoC) will integrate a
list of function blocks, and it will have a powerful
computing ability [1-3]. The traditional bus-based
on-chip architecture causes severe communication
conflicts, which becomes the bottleneck of developing
SoCs. A new architecture is urgently constructed by
decoupling Intellectual Property (IP) cores from a bus
pipeline. Thus, industry and academia communities
proposed the concept of Network-on-Chip (NoC) that
applies computer networking into chip design [2].
NoC implements the separation of computing and
communication resources at the low complexity of
designing the interconnection architecture inside a
multi-core processor [4-6].
While in NoCs, a very high local clock frequency
leads to serious capacitance delay and signal crosstalk.
According to the forecast report of ITRS, the local
clock frequency of NoCs will rise up to 73GHz in
2020 [7]. In addition, with the increasing number of IP
cores, both electrical switching rate and bandwidth
provisioning become very limited, and the power
consumption proportional to bit rate inevitably grows.
Owing to bit-rate transparency, optical waveguides are
power-efficient and have extremely high transmission
capacity, which makes Optical NoC (ONoC) become a
hot research topic.
There have been various types of 2-dimensional
(2D) ONoC topologies, mainly including mesh [8], fat
tree [9, 10] and so forth. However, with the increasing
number of IP cores on a single chip, the wavelength
conflict
1
will become worse in 2D ONoCs, thus
leading to a poor network throughput. For this end, 3D
ONoC was proposed [11-13] by using multi-chip
integration. Aside from supporting intra-layer packet
forwarding, 3D ONoC focuses on the communication
among IP cores from different chip layers, i.e.,
inter-layer packet forwarding. It means that, when the
wavelength conflict occurs in a chip layer, the relevant
packet can be transferred to another layer for the
purpose of avoiding this conflict. In addition, the 3D
integration reduces the physical connection length
between a pair of chip lines, resulting in short
transmission distance and latency.
Most existing works took 3D mesh ONoC into
account. It seems simple, but the advantage of other
topology structures is underutilized. Compared with
3D mesh, 3D torus is the better option of mitigating
wavelength conflicts due to its loopback characteristic.
Moreover, researchers always deployed the same type
of optical router in a 3D ONoC topology, which
results in the waste of chip resources such as micro
resonator and crossbar.
In this paper, we first propose 3D mesh and torus
ONoC topology structures assorted with optical
routers. Next, the routing algorithm is simplified so
long as the packet integrity can be ensured, meanwhile,
the connectivity, flexibility and deadlock-free are also
considered. In our switching mechanism, the electrical
layer controls the establishment and demolition of
lightpaths, while the optical layer forwards packets at
a considerable transmission speed. Finally, OPNET is
1
A communication pipeline will be influenced by another if they share
the same wavelength.