飞思卡尔IMX28X应用处理器数据手册：低功耗工业与消费市场利器

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"飞思卡尔i.MX28系列是一款专为消费电子产品和工业嵌入式市场设计的低功耗、高性能应用处理器。其核心基于ARM926EJ-S™内核，可实现高达454MHz的速度，旨在满足多种应用需求，如人机界面（HMI）面板（包括工业和家用）、工业驱动器、PLC控制、工厂机器人显示器、图形远程控制器、手持扫描仪与打印机、便携式医疗设备、智能电表与能源网关以及媒体电话和媒体网关。 i.MX28采用塑料封装，采用MAPBGA-289封装，尺寸为14x14毫米，引脚间距为0.8毫米，这提供了紧凑的尺寸和高集成度。其订购信息可在第3页的表1中找到，确保在购买时参考这些详细资料。该处理器的核心特点之一是集成的电源管理单元（PMU），它包括一个三输出DC-DC开关转换器和多个线性稳压器。这种设计旨在优化电源效率，适应各种应用场景对功耗的不同要求。这使得i.MX28能够在保持高性能的同时，有效地管理电池续航或外部电源供应，这对于移动设备和能源受限的环境尤其关键。此外，i.MX28还可能集成了其他功能模块，如高速缓存、多核处理能力、丰富的外设接口（如USB、UART、SPI、I2C等）、以及多媒体加速器，支持音频和视频处理，有助于提升用户体验和系统性能。它的低功耗特性使得它在电池驱动设备中表现出色，例如在医疗设备和移动终端上，可以延长待机时间和使用时间。为了充分利用i.MX28的功能和优势，开发者需要熟悉其datasheet中的详细规格，包括工作电压范围、最大电流消耗、接口速度、以及软件兼容性信息。开发过程中可能涉及的操作系统选择（如Linux、RTOS等）、驱动程序开发、以及针对具体应用的硬件配置，都需要在这份datasheet中寻找指导。总结来说，飞思卡尔i.MX28系列芯片以其高效能、低功耗和广泛的应用适应性，在现代电子设备中扮演着重要角色，对于追求创新和节能的设计师和工程师来说，深入理解并掌握其特性是至关重要的。"

Electrical Characteristics

i.MX28 Applications Processors for Consumer Products, Rev. 3

Freescale Semiconductor 13

3.1.2 DC Operating Conditions

Table 8 provides the DC recommended operating conditions.

Table 9 provides the DC operating temperature conditions.

Table 8. Recommended Power Supply Operating Conditions

Parameter Symbol Min Typ Max Unit

Analog Core Supply Voltage V

DDA

1.62 — 2.10 V

Digital Core Supply Voltage

Specification dependent on frequency.

1, 2

For optimum USB jitter performance, V

DDD

= 1.35 V or greater.

DDD

supply minimum voltage includes 75 mV guardband.

DDD

1.35 — 1.55 V

Digital Supply Voltages:

• VDDIO33/VDDIO33_EMI

• VDDIO18

DDIO33

DDIO33_EMI

DDI

O18

3.0

1.7

—

3.6

1.9

EMI Digital I/O Supply Voltage:

• DDR2/mDDR

• LVDDR2

DDIO.EMI

DDIO_EMIQ

1.7

1.425

1.8

1.5

1.9

1.625

Battery / DCDC Input Voltage—BATT, DCDC_BATT BATT

DCDC_BATT

3.10

Tested with only the i.MX28 processor loading the MX28 PMU output rails during start up. With external loadings (for example,

one DDR2 device and SD Card/NAND Flash), MX28 PMU was tested at BATT/DCDC_BATT > 3.30 V.

—4.242 V

VDD5V Supply Voltage — 4.75 5.00 5.25 V

Offstate Current:

When the real-time clock is enabled, the chip consumes additional current in the OFF state to keep the crystal oscillator and

the real-time clock running.

• 32-kHz RTC off, BATT = 4.2 V — — 21 47 µA

• 32-kHz RTC on, BATT = 4.2 V — — 23 51 µA

Table 9. Operating Temperature Conditions

Parameter

1, 2,

In most portable systems designs, battery and display specifications limits the operating range to well within these

specifications. Most battery manufacturers recommend enabling battery charge only when the ambient temperature is

between 0°C and 40°C. To ensure that battery charging does not occur outside the recommended temperature range, the

system ambient temperature may be monitored by connecting a thermistor to the LRADC0 or LRADC6 pin on the i.MX28.

For applications powered by external 5V only, the Maximum Ambient Operating Temperature specified in Tab le 9 may not be

achieved. Application developers need to do the worst-case power consumption estimation, and then calculate the Total

On-chip Power Dissipation based on the equations specified in note 3 below.

Symbol Min Typ Max Unit

Commercial Ambient Operating Temperature Range T

–20 — 70 °C

Commercial Junction Temperature Range T

–20 — 85 °C

Industrial Ambient Operating Temperature Range T

–40 — 85 °C

Industrial Junction Temperature Range T

–40 — 105 °C

i.MX28 Applications Processors for Consumer Products, Rev. 3

14 Freescale Semiconductor

Electrical Characteristics

Table 10 provides the recommended analog operating conditions.

Table 11 shows the PSWITCH input characteristics. See the reference schematics for the recommended

PSWITCH button circuitry.

Table 12 shows a test case example for Run IDD.

Maximum Ambient Operating Temperature may be limited due to on-chip power dissipation. T

A (MAX)

≤ T

- (Θ

x P

) where:

= Maximum Junction Temperature

= Package Thermal Resistance. See Section 3.2, “Thermal Characteristics.”

= Total On-chip Power Dissipation =PVDD4P2 + PBatteryCharger + PDCDC + PLinearRegulators + PInternal. Depending

on the application, some of these power dissipation terms may not apply.

PVDD4P2 = VDD4P2 On-Chip Power Dissipation = (VDD5V - VDD4P2) x IDD4P2

PBatteryCharger = Battery Charger On-Chip Power Dissipation = (VDD5V - BATT) x ICHARGE

PDCDC = DC-DC Converter On-Chip Power Dissipation = (BATT x DCDC Input Current) x (1 - efficiency)

PLinearRegulators = Linear Regulator On-Chip Power Dissipation = (VDD5V - VDDIO) x (IDDIO + IDDA + IDDD + IDD1P5) +

(VDDIO - VDDA) x (IDDA + IDDD) + (VDDA - VDDD) x IDDD + (VDDA - VDD1P5) x IDD1P5

PInternal = Internal Digital On-Chip Power Dissipation = ~VDDD x IDDD

Table 10. Recommended Analog Operating Conditions

Parameter Min Typ Max Unit

Low Resolution ADC Input Impedance (CH0 - CH5) >1 — — MΩ

Table 11. PSWITCH Input Characteristics

Parameter HW_PWR_STS_PSWITCH Min Max Unit

PSWITCH LOW LEVEL 0x00 0.00 0.30 V

PSWITCH MID LEVEL & STARTUP

A MID LEVEL PSWITCH state can be generated by connecting the VDDXTAL output of the SoC to PSWITCH through a

switch.

0x01 0.65 1.50 V

PSWITCH HIGH LEVEL

PSWITCH acts like a high impedance input (>300 kΩ) when the voltage applied to it is less than 1.5V. However, above 1.5V

it becomes lower impedance. To simplify design, it is recommended that a 10 kΩ resistor to VDDIO be applied to PSWITCH

to set the HIGH LEVEL state (the PSWITCH input can tolerate voltages greater than 2.45 V as long as there is a 10 kΩ resistor

in series to limit the current).

0x11 (1.1 * VDDXTAL) +

0.58

2.45 V

Table 12. Run IDD Test Case

CPUCLK = 300 MHz, AHBCLK = 150 MHz

Continuous read / write to the cache memory

Power Rail Conditions Min Typ Max Unit

VDDD 1.57 V — 150 188 mA

VDDIO33 3.62 V — 31 34 mA

VDDA 2.12 V — 1.11 1.17 mA

VDDIO_EMI 1.92 V — 1.01 1.08 mA

VDDIO18 1.92 V — 0.61 2.97 μA

Electrical Characteristics

i.MX28 Applications Processors for Consumer Products, Rev. 3

Freescale Semiconductor 15

Table 13 illustrates the power supply characteristics.

Table 13. Power Supply Characteristics

Parameter Min Typ Max Unit

Linear Regulators

Output Voltage Accuracy (V

DDIO

, V

DDA

, V

DDM

, V

DDD

)

No load.

–3 — +3 %

DDIO

Maximum Output Current (V

DDIO

= 3.30 V, V

DD5V

=4.75V)

Maximum output current measured when output voltage droops 100 mV from the programmed target voltage with no load

present.

Because the internal linear regulators are cascaded, it is not possible to simultaneously operate the V

DDIO

, V

DDA

, V

DDM

, and

DDD

linear regulators at the maximum specified load current. For example, the V

DDIO

linear regulator provides current to both

the V

DDIO

3.3 V supply rail as well as the V

DDM

and V

DDA

linear regulator inputs. Likewise, the V

DDA

linear regulator provides

current to both the 1.8 V supply rail as well as the V

DDD

linear regulator input. The application designer should ensure the

following two conditions are met:

DDIO

Load Current + V

DDM

Load Current + V

DDA

Load Current) < V

DDIO

Maximum Output Current

DDA

Load Current + V

DDD

Load Current) < V

DDA

Maximum Output Current

270 — — mA

DDM

Maximum Output Current (V

DDM

= 1.5 V)

160 — — mA

DDA

Maximum Output Current (V

DDA

=1.8V)

2, 3

225 — — mA

DDD

Maximum Output Current (V

DDD

=1.2V)

2, 3

200 — — mA

DCDC Converters

Output Voltage Accuracy (DCDC_VDDIO, DCDC_VDDA,

DCDC_VDDD)

–3 — +3 %

DCDC_VDDD Maximum Output Current (V

DDD

= 1.55 V)

DCDC Double FETs Enabled, Inductor Value = 15 μH.

The DCDC Converter is a triple output buck converter. The maximum output current capability of each output of the converter

is dependent on the loads on the other two outputs. For a given output, it may be possible to achieve a maximum output current

higher than that specified by ensuring the load on the other outputs is well below the maximum.

250 — — mA

DCDC_VDDA Maximum Output Current (V

DDA

=1.8V)

200 — — mA

DCDC_VDDIO Maximum Output Current (V

DDIO

= 3.15 V, 3.3 V < BATT

< 4.242 V)

5, 6

Assumes simultaneous load of IDDD = 250 mA@ 1.55 V and IDDA = 200 mA@1.8 V.

250 — — mA

VDD4P2 Regulated Output

VDD4P2 Output Voltage Accuracy (TARGET=4.2V)

–3 — +3 %

VDD4P2 Output Current Limit Accuracy (VDD5V = 4.75 V,

ILIMIT=480 mA)

Untuned.

480 500 520 mA

VDD4P2 Output Current Limit Accuracy (VDD5V=4.75 V,

ILIMIT=100 mA)

100 120 140 mA

Battery Charger

Final Charge Voltage Accuracy (TARGET=4.2 V) -2 — +1 %

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