超薄SnOx封层调整治动a-IGZO TFT阈值电压与耗尽负载逆变器应用

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本文主要探讨了具有超薄SnOx封盖层的a-IGZO（非晶态铟镓锌氧化物）薄膜晶体管（TFT）的阈值电压调整策略及其在耗尽负载逆变器中的应用潜力。a-IGZO因其优异的电导性能和可溶液处理的特点，在微电子领域有着广泛应用，但其阈值电压的可调性是设计多功能电子电路的关键因素。研究者发现，通过在a-IGZO TFT底部添加不同厚度的SnOx层，可以显著改变其阈值电压特性。当SnOx层厚度从0纳米增加到19纳米时，阈值电压从最初的15.2伏特降低到了-9.0伏特，这一现象表明SnOx对a-IGZO通道层内的电子行为产生了显著影响。这种变化被认为与SnOx能够抽取a-IGZO中的松散束缚氧原子有关，因为SnOx的成分随着厚度的增加而呈现出相应的改变。 SnOx作为一种氧化物半导体，其能带工程特性使得它能够在一定程度上调控a-IGZO的电荷陷阱行为，从而影响阈值电压。通过控制SnOx的厚度，工程师可以灵活地调节器件的开关速度和功耗，这对于实现高性能的显示器、传感器和逻辑电路至关重要。在耗尽负载逆变器的设计中，这种可调阈值电压的a-IGZO TFT具有显著的优势。耗尽负载逆变器依赖于器件的阈值电压来控制电流的流动，较低的阈值电压意味着更低的开启电压，有助于提高电路的能源效率和响应速度。因此，利用超薄SnOx封盖层调整a-IGZO TFT的阈值电压，可以优化逆变器的整体性能，使其在低功耗、高速度的应用场景下表现出色。然而，文章还指出，尽管这项工作展示了巨大的潜力，但实际应用可能还需要进一步的研究，包括深入理解SnOx/a-IGZO界面的物理机制，以及优化工艺条件以确保器件的稳定性和一致性。随着对这些因素的深入探索，未来有望看到基于这种超薄SnOx封盖层a-IGZO TFT的高性能电子设备的商业化发展。

0741-3106 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/LED.2016.2525761, IEEE Electron

Device Letters

Abstract—Tunable threshold voltage of a thin-film transistor

(TFT) is highly desirable for designing multifunctional electronic

circuits. In this work, an ultrathin SnO

capping layer was

adopted to modify the threshold voltage of bottom-gate

amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs. A

threshold voltage shift from 15.2 to -9.0 V was observed as the

SnO

thicknesses increased from 0 to 19 nm, accompanying by a

sizable increase of the intrinsic electron concentration in the

channel layer. It was believed that the SnO

capping layer can

extract loosely bound oxygen from the a-IGZO, which was

supported by the SnO

composition variation with its thickness.

Combining an uncovered a-IGZO TFT with a SnO

capped

a-IGZO TFT, an Enhancement/Depletion inverter with a voltage

gain up to 45.9 was successfully demonstrated.

Index Terms—Amorphous indium-gallium-zinc-oxide

(a-IGZO), Tin oxides (SnO

), thin-film transistor, inverter,

capping layer.

I. INTRODUCTION

morphous indium-gallium-zinc-oxide thin film transistor

(a-IGZO TFT) arrays have attracted ever-increasing

attention as backplanes in active matrix liquid crystal displays

(AMLCDs) or active-matrix organic light-emitting diode

displays (AMOLEDs) [1]. Meanwhile, there have been various

attempts to use a-IGZO TFTs in logic circuits [2],

photodetectors [3], memory devices [4], bio-sensors [5] and so

on. Oxide-based inverters, acting as “built blocks” of logic

circuits, are extensively studied in recent years.

Complementary inverters using p-type SnO

/n-type In

[6]

or hybrid n-type IGZO/p-type pentacene [7],

complementary-like inverters based on ambipolar SnO TFTs

[8], resistor-loaded inverters, and enhancement/depletion (E/D)

inverters have already been demonstrated. Among them, the

E/D inverter utilizing two n-channel TFTs with different

threshold voltage (V

) is a promising supplementary

technology for complementary logic circuits.

In order to tune the V

difference as much as possible,

various methods have been reported, such as varying the active

layer thickness [9], adopting distinct active layer material [10],

selectively inducing the negative bias illumination temperature

stress (NBITS) to the load TFT [11], and applying a constant

This work is supported by the National Natural Science Foundation of China

(Grant No. 61474126), and National Basic Research Program of China

(2012CB933003).

M. Wang, L. Y. Liang, H. Luo, S. N. Zhang, H. L. Zhang, K. Javaid and H.

T. Cao are with Ningbo Institute of Material Technology and Engineering,

Chinese Academy of Sciences, & Key Laboratory of Additive Manufacturing

Materials of Zhejiang Province, Ningbo 315201, People‟s Republic of China.

(E-mail: h_cao@nimte.ac.cn ; lly@nimte.ac.cn ).

K. Javaid is also with the Department of Physics, GC University

Faisalabad, Allama Iqbal Road, 38000 Faisalabad, Pakistan.

positive bias on the top gate [12], etc. However, these inverters

demonstrated either low voltage gains (< 40) or rather

complicated fabrication processes, limiting their applications.

Passivation layers with a thickness larger than 100 nm

were generally deposited to improve the electrical stability of

TFTs. However, various passivation layers (such as SiO

[13],

MgF

[14]) fabricated in vacuum system were found to not only

shift the V

negatively but also induce a very large off-current.

In this letter, by introducing a thin SnO

capping layer onto the

uncovered back channel surface (Bottom-gate top-contact TFT

structure), tunable V

of a-IGZO TFTs was achieved without

scarifying other device properties. Then an E/D inverter with a

voltage gain up to 45.9 was constructed by connecting an

uncovered a-IGZO TFT with a SnO

-covered one. This E/D

inverter has a relatively simple fabrication process, manifesting

a good application potential for the future logic circuits based

on oxide semiconductors.

II. DEVICE STRUCTURE AND FABRICATION

Bottom-gate transistors using a-IGZO as the channel layer

were fabricated at room temperature. A-IGZO thin films were

deposited on SiO

(100 nm)/Si substrate by RF sputtering,

applying a 2 in. IGZO target (1:1:1 mol. % of In

:Ga

ZnO) at a power of 80 W. The base pressure of the chamber was

less than 4 × 10

−4

Pa. 30 nm channel films were deposited in a

100% Ar atmosphere at a constant pressure of 0.21 pa (Ar flow

= 6 sccm). Afterwards, a shadow mask was used to define the

channel length and width of 400 and 800 μm, respectively.

Ti/Au (30 nm/30 nm) source/ drain electrodes were deposited

by electron beam evaporation using the second shadow mask.

The devices were then annealed at 250

C in the air for 1 hour.

Amorphous SnO

films with different thicknesses were

deposited at room temperature onto the back channel surface of

the fabricated a-IGZO TFTs through electron beam evaporation

(Deposition details were reported elsewhere [15]). Finally, an

E/D inverter was fabricated by connecting a bare TFT as the

driver and an 8.5 nm SnO

-covered TFT as the load. The

fabricated TFTs and inverters are finally passivated by SU-8

photo-resist to improve the device stability.

III. RESULTS AND DISCUSSION

Surface morphologies of the a-IGZO films covered with

or without amorphous SnO

films were investigated using

atomic force microscope (AFM), as seen in Figure 1. These

surfaces are apparently smooth without obvious embossment.

As shown in figure 1(d), the root mean square (RMS)

roughness as a function of the SnO

thickness is ranging from

0.50-0.60 nm, indicating that the deposition of the SnO

Mei Wang, Lingyan Liang, Hao Luo, Shengnan Zhang, Hongliang Zhang, Kashif Javaid, and

Hongtao Cao

Threshold voltage tuning in a-IGZO TFTs with ultrathin

SnO

capping layer and application to Depletion-Load

Inverter

Coupled Dual-Gate Oxide-based Transistors on

Sodium Alginate Electrolytes

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