Figures
xviii
5–4 I/O Mux Control Register C (MCRC) — Address 7094h 5-8. . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–5 Port A Data and Direction Control Register (PADATDIR) 5-9. . . . . . . . . . . . . . . . . . . . . . . . . . .
5–6 Port B Data and Direction Control Register (PBDATDIR) 5-11. . . . . . . . . . . . . . . . . . . . . . . . . .
5–7 Port C Data and Direction Control Register (PCDATDIR) 5-12. . . . . . . . . . . . . . . . . . . . . . . . . .
5–8 Port D Data and Direction Control Register (PDDATDIR) 5-13. . . . . . . . . . . . . . . . . . . . . . . . . .
5–9 Port E Data and Direction Control Register (PEDATDIR) 5-14. . . . . . . . . . . . . . . . . . . . . . . . . .
5–10 Port F Data and Direction Control Register (PFDATDIR) 5-15. . . . . . . . . . . . . . . . . . . . . . . . . .
6–1 Event Manager (EVA) Block Diagram 6-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–2 Event Manager (EVB) Block Diagram 6-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–3 General-Purpose Timer Block Diagram (x = 2 or 4)
[when x = 2: y = 1 and n = 2;
when x = 4: y = 3 and n = 4] 6-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–4 GP Timer Continuous Up-Counting Mode (TxPR = 3 or 2) 6-23. . . . . . . . . . . . . . . . . . . . . . . . .
6–5 GP Timer Directional Up-/Down-Counting Mode: Prescale Factor 1 and TxPR = 3 6-24. . . .
6–6 GP Timer Continuous Up-/Down-Counting Mode (TxPR = 3 or 2) 6-25. . . . . . . . . . . . . . . . . . .
6–7 GP Timer Compare/PWM Output in Up-Counting Mode 6-27. . . . . . . . . . . . . . . . . . . . . . . . . . .
6–8 GP Timer Compare/PWM Output in Up-/Down-Counting Modes 6-28. . . . . . . . . . . . . . . . . . . .
6–9 Timer Control Register (TxCON; x = 1, 2, 3, or 4) — Addresses 7404h (T1),
7408h (T2), 7504h (T3), and 7508h (T4) 6-31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–10 GP Timer Control Register A (GPTCONA) — Address 7400h 6-33. . . . . . . . . . . . . . . . . . . . . .
6–11 GP Timer Control Register B (GPTCONB) — Address 7500h 6-34. . . . . . . . . . . . . . . . . . . . . .
6–12 Compare Unit Block Diagram
(For EVA: x = 1, 2, 3; y = 1, 3, 5; z = 1.
For EVB: x = 4, 5, 6; y = 7, 9, 11; z = 2) 6-37. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–13 Compare Control Register A (COMCONA) — Address 7411h 6-39. . . . . . . . . . . . . . . . . . . . . .
6–14 Compare Control Register B (COMCONB) — Address 7511h 6-41. . . . . . . . . . . . . . . . . . . . . .
6–15 Compare Action Control Register A (ACTRA) — Address 7413h 6-42. . . . . . . . . . . . . . . . . . .
6–16 Compare Action Control Register B (ACTRB) — Address 7513h 6-44. . . . . . . . . . . . . . . . . . .
6–17 PWM Circuits Block Diagram 6-46. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–18 Dead-Band Timer Control Register A (DBTCONA) — Address xx15h 6-48. . . . . . . . . . . . . . .
6–19 Dead-Band Timer Control Register B (DBTCONB) — Address xx15h 6-49. . . . . . . . . . . . . . .
6–20 Dead-Band Unit Block Diagram (x = 1, 2, or 3) 6-52. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–21 Output Logic Block Diagram (x = 1, 2, or 3; y = 1, 2, 3, 4, 5, or 6) 6-54. . . . . . . . . . . . . . . . . . .
6–22 Asymmetric PWM Waveform Generation With Compare Unit and PWM Circuits
(x = 1, 3, or 5) 6-57. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–23 Symmetric PWM Waveform Generation With Compare Units and PWM
Circuits (x = 1, 3, or 5) 6-58. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–24 3-Phase Power Inverter Schematic Diagram 6-60. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–25 Basic Space Vectors and Switching Patterns 6-62. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–26 Symmetric Space Vector PWM Waveforms 6-65. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–27 Capture Units Block Diagram (EVA) 6-67. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–28 Capture Units Block Diagram (EVB) 6-68. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–29 Capture Control Register A (CAPCONA) — Address 7420h 6-70. . . . . . . . . . . . . . . . . . . . . . .
6–30 Capture Control Register B (CAPCONB) — Address 7520h 6-72. . . . . . . . . . . . . . . . . . . . . . .
6–31 Capture FIFO Status Register A (CAPFIFOA) — Address 7422h 6-74. . . . . . . . . . . . . . . . . . .
6–32 Capture FIFO Status Register B (CAPFIFOB) — Address 7522h 6-75. . . . . . . . . . . . . . . . . . .
6–33 Quadrature Encoder Pulse (QEP) Circuit Block Diagram for EVA 6-78. . . . . . . . . . . . . . . . . . .