TI BQ7961x系列 Automotive Battery Monitor 数据手册：精确监控与保护

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BQ7961x系列，如BQ79612-Q1、BQ79614-Q1和BQ79616-Q1，是由Texas Instruments (TI)推出的一款高性能的12S、14S和16S汽车级电池监控器、均衡器以及集成硬件保护器。这些数据手册针对的是先进的信息，适用于预生产阶段的产品，可能会在未经通知的情况下进行更改。该系列的主要特点包括： 1. **严格的汽车应用认证**：BQ7961x芯片经过了AEC-Q100认证，这是一种专门针对汽车电子产品的质量标准，确保了它们在极端环境下的可靠性和性能。产品能够在-40°C到+125°C的宽温范围内稳定工作，并满足设备温度等级1的要求，适应汽车电池系统的严苛条件。 2. **多功能性**：作为一款精确的电池监控器，它能够监测电池电压，提供关键的电池状态信息，有助于确保电池系统的健康运行。同时，它具备均衡功能，可以检测并管理电池单元之间的电压不平衡，以延长电池寿命并防止热失控。 3. **通信接口**：支持UART（通用异步收发器）或SPI（同步串行接口），使得芯片与微控制器（MCU）之间可以方便地进行数据交换，便于系统集成和远程控制。 4. **电压隔离和模块化设计**：内置隔离组件，保护系统免受电气干扰，确保了安全性和可靠性。此外，其模块化设计允许灵活配置，适合不同的电池模块和连接需求。 5. **电容式水平转换差分接口**：这种接口技术提高了信号传输的抗噪声能力和电气隔离，增强了系统的信号质量和抗干扰能力。 6. **可选环路连接**：提供了额外的连接选项，可以根据实际应用需求选择是否使用，以优化电路布局和效率。 7. **重要注意事项**：文档末尾的注意事项强调了产品的可用性、保修政策、安全性关键应用的使用限制、知识产权声明以及其他重要免责声明，用户在使用前应仔细阅读。 BQ7961x是一款专为汽车电池系统设计的集成解决方案，它结合了高精度的电压测量、均衡控制和硬件保护功能，旨在提升电动汽车和混合动力汽车电池的性能和寿命。对于任何涉及这类电池管理系统的设计工程师或维护人员来说，理解并掌握这款芯片的工作原理、接口和操作方式是至关重要的。

TI Confidential – NDA Restrictions

ADVANCEINFORMATION

TI Confidential — NDA Restrictions

BQ79612-Q1

BQ79614-Q1

BQ79616-Q1

SLUSB75 –MARCH 2020

www.ti.com

Product Folder Links: BQ79612-Q1 BQ79614-Q1 BQ79616-Q1

Electrical Characteristics (continued)

over operating -40℃ to 125℃ free-air temperature range, VBAT = 9V to 80V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

OV_COMP_

ACC

OV comparator accuracy

= -20°C to 65°C -13 13 mV

= -40°C to 105°C -17 17 mV

UV_COMP_

RANGE

UV comparator detection

threshold range

Step of 50 mV 1200 3100 mV

UV_COMP_

HYS

UV comparator hysteresis after

detection

50 mV

UV_COMP_

ACC

UV comparator accuracy

= -20°C to 65°C -30 30 mV

= -40°C to 105°C -50 50 mV

HW Temperature Comparator/Protector (NTC OT/UT)

OT_COMP_

RANGE

OT comparator detection

threshold range

Step of 1%, ratiometric with respect to TSREF

(% of TSREF)

10 39 %

OT_COMP_

HYS

OT comparator hysteresis after

detection

2 %

OT_COMP_

ACC

OT comparator accuracy -1 1 %

UT_COMP_

RANGE

UT comparator detection

threshold range

Step of 2%, ratiometric with respect to TSREF

(% of TSREF)

64 80 %

UT_COMP_

HYS

UT comparator hysteresis after

detection

2 %

OT_COMP_

ACC

UT comparator accuracy -1 1 %

Digital I/Os (TX, RX, GPIO, SPI master)

Output as logic level high (TX,

GPIO as output)

GPIO is configured as output. I

OUT

= 1 mA

CVDD

–

0.3

Output as logic level low (TX,

NFAULT, GPIO as output)

GPIO is configured as output. I

OUT

= 1 mA 0.3 V

Input as logic level high (RX, GPIO

as fault input)

GPIO is configured as input. I

OUT

= 1 mA

0.75 x

CVDD

Input as logic level low (RX, GPIO

as fault input)

GPIO is configured as input. I

OUT

= 1 mA

0.25 x

CVDD

COML and COMH

DCTX

Transmitter output impedance

(COML and COMH)

15 Ω

DCCM

Common mode

impedance (COML and COMH)

45 kΩ

DCCM

Common mode

voltage (COML and COMH)

2.37 2.5 2.57 V

COMM_DA

TA2

Receiver threshold range (V

COMP

COML

) form communication

0.4 1.2 V

COMM_TO

NE2

Receiver threshold range (V

COMP

COML

) form Tone

0.4 1.2 V

8.6 Timing Requirements

over operating -40℃ to 125℃ free-air temperature range, VBAT = 9V to 80V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT

POWER STATE TIMING

SU(WAKE_SHUT)

Startup from SHUTDOWN to ACTIVE

mode

Base device: From the end of WAKE

ping to the start of a forwarding WAKE

tone

6 10 ms

Stack device: From the end of a

received WAKE tone to the start of a

forwarding WAKE tone

6 10 ms

TI Confidential – NDA Restrictions

ADVANCEINFORMATION

TI Confidential — NDA Restrictions

BQ79612-Q1

BQ79614-Q1

BQ79616-Q1

www.ti.com

SLUSB75 –MARCH 2020

Product Folder Links: BQ79612-Q1 BQ79614-Q1 BQ79616-Q1

Timing Requirements (continued)

over operating -40℃ to 125℃ free-air temperature range, VBAT = 9V to 80V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT

SU(SLP2ACT)

Startup from SLEEP to ACTIVE mode

Base device: From the end of

SLEEP2ACTIVE ping to the start of a

forwarding SLEEP2ACTIVE tone

200 µs

Stack device: From the end of a

received SLEEP2ACTIVE tone to the

start of a forwarding SLEEP2ACTIVE

tone

200 µs

SU(WAKE_SLP)

Startup from SLEEP to ACTIVE mode

(with WAKE ping/tone)

Base device: From the end of WAKE

ping to the start of a forwarding WAKE

tone

1 ms

Stack device: From the end of a

received WAKE tone to the start of a

forwarding WAKE tone

1 ms

SLP

From ACTIVE to SLEEP mode

From receiving SLEEP entry condition

to enter in SLEEP mode

100 µs

SHTDN

From ACTIVE to SHUTDOWN mode

From receiving SHUTDOWN entry

condition to enter in SHUTDOWN

mode (all LDOs in 10% of their

nominal values)

20 ms

RST

Reset time during ACTIVE mode

CONTROL1[SOFT_RST] = 1 is sent to

a completion of the digital reset

1 ms

HWRST

75 ms

SUPPLIES TIMING

TSREF_ON

TSREF ramp up time (10%-90%) C

TSREF

= 1µF 6 ms

TSREF_OFF

TSREF ramp down time (90%-10%) C

TSREF

= 1µF 8 ms

LDO_OSC_DET

Oscillation detection on the internal

LDOs

10 MHz

PING SIGNAL TIMING

HLD_WAKE

WAKE ping low time on RX pin 2 2.5 ms

HLD_SD

SHUTDOWN ping low time on RX pin 7 10 ms

UART(StA)

SLEEPtoACTIVE ping low time on RX

250 300 µs

HLD_HWRST

HW_RESET ping low time on RX pin 36 ms

COML and COMH (PULSE and TONE TIMING)

PW_DC

COMM: Pulse width of data (half-bit

time) for communication

230 250 270 ns

RECLK_DC

COMM: data reclocking delay per

device from COMH to COML or vice

versa

4 5 µs

COMTONE

Time between pulses of comm tones

(HFO based). Comm Tones are

WAKE, SLEEPtoACTIVE,

SHUTDOWN, HWRST tones

11 15 µs

COMMTONE_HI

The HIGH time of each comms pulse

(HFO base)

0.92 1 1.08 µs

COMMTONE_LO

The LOW time of each comms pulse

(HFO base)

0.92 1 1.08 µs

FLTTONE

Time between pulses of FAULT Tone

(LFO based). Applies to FAULT Tone

and HEARTBEAT

11.5 µs

FLTTONE_HI

The HIGH time of each pulse of the

tone couplet

1 µs

FLTTONE_LO

The LOW time of each pulse of the

tone couplet

1 µs

TI Confidential – NDA Restrictions

ADVANCEINFORMATION

TI Confidential — NDA Restrictions

BQ79612-Q1

BQ79614-Q1

BQ79616-Q1

SLUSB75 –MARCH 2020

www.ti.com

Product Folder Links: BQ79612-Q1 BQ79614-Q1 BQ79616-Q1

Timing Requirements (continued)

over operating -40℃ to 125℃ free-air temperature range, VBAT = 9V to 80V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT

WAKEDET

Number of pulses to detect as a WAKE

tone

60 pulses

WAKE

Number of pulses to transit for a

WAKE tone

90 pulses

SHDNDET

Number of pulses to detect as a

SHUTDOWN tone

180 pulses

SHDN

Number of pulses to transit for a

SHUTDOWN tone

270 pulses

SLPtoACTDET

Number of pulses to detect as a

SLEEPtoACTIVE tone

20 pulses

SLPtoACT

Number of pulses to transit for a

SLEEPtoACTIVE tone

30 pulses

HWRSTDET

Number of pulses to detect as a

HW_RESET tone

540 pulses

HWRST

Number of pulses to transit for a

HW_RESET tone

810 pulses

HBDET

HEARTBEAT: Number of pulses to

detect as a valid tone

20 pulses

HEARTBEAT: Number of pulses to

transit for a tone

30 pulses

HB_PERIOD

HEARTBEAT: Period between

HEARTBEAT Burst (from the

beginning of a HEARTBEAT to the

beginning of the next HEARTBEAT)

360 400 440 ms

HB_TIMEOUT

HEARTBEAT: Timeout to considered

as not receiving HEARTBEAT

0.9 1 1.1 s

HB_FAST

HEARTBEAT: If HEARTBEAT is

received within this time, it is

considered receiving HEARTBEAT too

fast

200 ms

FTONEDET

FAULT TONE: Number of pulses to

detect as a valid tone

60 pulses

FTONE

FAULT TONE: Number of pulses to

transit for a tone

90 pulses

FTONE_PERIOD

FAULT TONE: Period between FAULT

TONE Burst (from the beginning of a

FAULT TONE to the beginning of the

next FAULT TONE)

50 ms

FTS_LATENCY

Fault Tone latency in Stack Device

From time a device receive the tone to

the time the same device detects and

generate its fault tone

48 µs

FTB_LATENCY

Fault Tone latency in Base Device

From the time a device receive the

tone to the time the same device

detects and asserts NFAULT

24 µs

MAIN and AUX ADC TIMING

SAR_CONV

Single conversion time (both Main and

AUX ADCs)

8 µs

MAIN_ADC_CYCLE

Single round robin cycle (Main ADC) 192 µs

AUX_ADC_CYCLE

Single round robin cycle (AUX ADC) 192 µs

AFE_SETTLE

Analog front end (Level shifters)

settling time whenever device enter

ACTIVE mode from SLEEP or

SHUTDOWN

4 ms

ADC_ACC

All ADC timing accuracy 10 %

BALANCING TIMING

BAL_ACC

Balancing timer accuracy 10 %

TI Confidential – NDA Restrictions

ADVANCEINFORMATION

TI Confidential — NDA Restrictions

BQ79612-Q1

BQ79614-Q1

BQ79616-Q1

www.ti.com

SLUSB75 –MARCH 2020

Product Folder Links: BQ79612-Q1 BQ79614-Q1 BQ79616-Q1

Timing Requirements (continued)

over operating -40℃ to 125℃ free-air temperature range, VBAT = 9V to 80V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT

HW COMPARATORS/PROTECTORS TIMING

OV_CYCLE

OV round robin cycle 8 ms

UV_CYCLE

UV round robin cycle 8 ms

OVUV_BIST_CYCLE

OV and UV BIST cycle 23 ms

OT_CYCLE

OT round robin cycle 4 ms

UT_CYCLE

UT round robin cycle 4 ms

OTUT_BIST_CYCLE

OT and UT BIST cycle 20 ms

HW_COMP_ACC

OV, UV, OT, UT comparators timing

accuracy

10 %

I/O TIMING (TX, RX, GPIO, NFAULT)

RISE

Rise Time

CVDD

> MIN V

CVDD

, C

LOAD

= 150pF,

GPIO in output mode

12 ns

FALL

Fall Time (exclude NFAULT)

CVDD

> MIN V

CVDD

, C

LOAD

= 150pF,

GPIO in output mode

12 ns

FALL_NFAULT

Fall Time on NFAULT

CVDD

> MIN V

CVDD

, C

LOAD

= 150pF,

PULLUP

= 10kΩ

100 ns

UART TIMING

UART

BAUD

UART TX/RX Baud Rate 1 Mbps

UART

ERR_BAUD(R

UART RX baud rate error -1 1 %

UART

ERR_BAUD(TX

)

UART TX baud rate error -1 1 %

UART(CLR)

UART Clear low time 15 20

bit

period

UART(RX_HIGH)

UART high time before sending

Clear or Reset

bit

period

OTP NVM TIMING

PROG

OTP programming time (from

[PROG_GO] = 1 to [DONE] =1)

LDOIN capacitor = TBD µF 100 ms

CRC_CUST

Time to complete a single cycle of

CRC check on the customer OTP

space

175 µs

CRC_FACT

Time to complete a single cycle of

CRC check on the factory OTP space

1.6 ms

SPI MASTER TIMING

SCLK

SCLK frequency 450 500 550 kHz

HIGH,

LOW

SCLK duty cycle 40 50 60 %

SS(HIGH)

SS HIGH latency time. Time from

4 µs

SS(LOW)

SS LOW latency time. Time from

4 µs

SU(MISO)

MISO input data setup time MISO stable before SCLK transition 100 ns

HD(MISO)

MISO input dat hold time MISO stable after SCLK transition 0 ns

OSCILLATOR

HFO

High frequency oscillator 31.68 32 32.32 MHz

LFO

Low frequency oscillator 248.9 262 275.1 kHz

TI Confidential – NDA Restrictions

ADVANCEINFORMATION

TI Confidential — NDA Restrictions

BQ79612-Q1

BQ79614-Q1

BQ79616-Q1

SLUSB75 –MARCH 2020

www.ti.com

Product Folder Links: BQ79612-Q1 BQ79614-Q1 BQ79616-Q1

9 Detailed Description

9.1 Overview

The BQ7961x-Q1 device is a stackable battery monitor that measures cell voltages and temperature. The device

supports 6 to 16 series-connected (6S to 16S) battery cells. It allows up to 3 bus bar connections and

measurements using cell sensing input channels or a dedicated bus bar channel maximizing the device flexibility

to support various battery module sizes.

Multiple devices can be connected in a daisy chain. Each device has a pair of high (north) and low (south)

vertical differential communication ports, requiring only one twisted pair cable. The device supports either

capacitive only, capacitive and choke, or transformer isolation. Communication is reclocked on each daisy-

chained device, ensuring communication integrity for long distances. An optional RING connection is supported

to reverse the daisy chain communication direction in case of cable failure. Each device includes a SPI master

configured through the GPIOs.

The device is ASIL-D compliant on voltage and temperature measurements, and communication. The ADCs in

the daisy-chained devices can be configured to align the start of cell voltage measurements and all cell voltages

can be measured within 128 μs. Each cell sensing channel includes with a post-ADC digital low-pass filter (LPF)

for noise reduction as well as providing moving average measurement results. The device has 8 GPIOs, all of

which are configurable for NTC thermistor connections or use as general purpose I/O. All 8 GPIOs can be

measured within 1.6 ms.

The device supports passive balancing through an internal cell balancing MOSFET (CBFET) for each cell. The

balancing function runs autonomously without microcontroller (MCU) interaction. It includes an option to pause

and then resume balancing based on a programmable threshold detected by the external thermistor or if the die

temperature is too high (greater than 105°C). Once balancing starts, the device tracks the balancing time on

each cell. MCU can read out the remaining balancing time at any time.

The device includes a hardware OVUV comparator and an OTUT comparator with user configurable thresholds.

These can be used as a second-level protector for cell over- and undervoltage and thermistor over- and

undertemperature detections independent of ADC measurements.

The device provides an option to embed fault status information to the communication frame. When a device in

the daisy chain detects a fault condition, this information is embedded and travels along the communication

response frame to the bottom device which can be configured to trigger an NFAULT pin as an interrupt signal to

the system. This provides a way to reduce communication overhead without adding an additional twisted pair

cable and isolation for faster fault detection.

The device has SLEEP and SHUTDOWN modes for lower power consumption. All functions work in ACTIVE

mode, balancing and hardware comparators for OVUV and OTUT also work in SLEEP mode. While in

SHUTDOWN, all active functions are turned off. A HW reset function is available and can be activated by the

host MCU. The HW reset provides a POR-like event to the device without actual battery removal. This provides a

reliable, low cost, and recoverable option to improve overall system robustness.

9.2 Functional Block Diagram

The BQ79616 functional block diagram also applies to BQ79614 and BQ79612 but with fewer VC and CB input

channels.

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