5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_BS#0
DDR_A_D26
DDR_A_D29
DDR_A_D27
DDR_A_D30
DDR_A_D33
DDR_A_D31
DDR_A_D32
DDR_A_D28
DDR_A_D34
DDR_A_D35
DDR_A_D38
DDR_A_D36
DDR_A_D39
DDR_A_D37
DDR_A_D41
DDR_A_D42
DDR_A_D44
DDR_A_D40
DDR_A_D43 DDR_A_D47
DDR_A_D48
DDR_A_D45
DDR_A_D46
DDR_A_D49 DDR_A_D53
DDR_A_D51 DDR_A_D55
DDR_A_D50
DDR_A_D52
DDR_A_D56
DDR_A_D54
DDR_A_D59
DDR_A_D57
DDR_A_D58
DDR_A_D61
DDR_A_D63
DDR_A_D60
DDR_A_D3
DDR_A_D8
DDR_A_D6
DDR_A_D7
DDR_A_D5
DDR_A_D14
DDR_A_D9
DDR_A_D11
DDR_A_D10
DDR_A_D13
DDR_A_D16
DDR_A_D15
DDR_A_D12
DDR_A_D17
DDR_A_D20
DDR_A_D18 DDR_A_D22
DDR_A_D19
DDR_A_D24
DDR_A_D21
DDR_A_D23
DDR_A_BS#2
DDR_A_BS#1
DDR_A_D25
DDR_A_D62
DDR_A_DM7
DDR_A_DM2
DDR_A_DM4
DDR_A_DM3
DDR_A_DM1
DDR_A_DM0
DDR_A_DM6
DDR_A_DM5
DDR_A_MA4
DDR_A_D0
DDR_A_D2
DDR_A_D1
DDR_A_D4
DDR_A_MA11
DDR_A_MA10
DDR_A_MA12
DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA5
DDR_A_MA7
DDR_A_MA3
DDR_A_MA0
DDR_A_MA13
DDR_A_MA15
DDR_A_MA2
DDR_A_MA1
DDR_A_MA14
DDR_A_DQS2
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS#1
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS3
DDR_A_DQS6
DDR_A_DQS#7
DDR_A_DQS#4
DDR_A_DQS#2
DDR_A_DQS#6
DDR_A_DQS#3
DDR_A_DQS1
DDR_A_DQS#5
DDR_A_ODT1
DDR_A_CKE0
DDR_A_CS1#
DDR_A_RAS#
DDR_A_WE#
DDR_A_CKE1
DDR_A_CAS#
DDR_A_CS0#
DDR_A_CLK#2
DDR_A_ODT0
DDR_A_CLK#1
DDR_A_CLK1
DDR_A_CLK2
SMB_CK_DAT0
SMB_CK_CLK0
DDR_A_MA10
DDR_A_BS#0
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA4
DDR_A_CS1#
DDR_A_ODT1
DDR_A_MA0
DDR_A_MA6
DDR_A_ODT0
DDR_A_MA13
DDR_A_CS0#
DDR_A_MA2
DDR_A_RAS#
DDR_A_BS#1
DDR_A_CKE1
DDR_A_MA14
DDR_A_MA15
DDR_A_MA7
DDR_A_MA11
DDR_A_CAS#
DDR_A_WE#
DDR_A_MA1
DDR_A_MA9
DDR_A_MA8
DDR_A_MA3
DDR_A_BS#2
DDR_A_CKE0
DDR_A_MA12
DDR_A_MA5
DDR_A_MA[0..15]<5>
DDR_A_D[0..63]<5>
DDR_A_DQS[0..7]<5>
DDR_A_DM[0..7]<5>
DDR_A_DQS#[0..7]<5>
DDR_A_CLK1 <5>
DDR_A_CLK#1 <5>
DDR_A_CKE0<5>
DDR_A_BS#2<5>
DDR_A_BS#0<5>
DDR_A_WE#<5>
DDR_A_CAS#<5>
DDR_A_CS1#<5>
DDR_A_ODT1<5>
DDR_A_CLK2 <5>
DDR_A_CLK#2 <5>
DDR_A_CS0# <5>
DDR_A_ODT0 <5>
DDR_A_RAS# <5>
DDR_A_BS#1 <5>
DDR_A_CKE1 <5>
SMB_CK_CLK0<9,14,18>
SMB_CK_DAT0<9,14,18>
+1.8V+DIMM_VREF+1.8V+1.8V
+3VS
+1.8V
+0.9V
+0.9V
+0.9V
+0.9V
+1.8V
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
U1 LA-4381P
0.0
DDR2 SODIMM-I Socket
Custom
841Wednesday, January 16, 2008
2007/12/12 2008/12/12
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V
2007-01-17 Add
PLACE CLOSE TO SO-DIMM1 AS POSSIBLE
REVERSE TYPE
LOW SLOT
C217
4.7U_0805_6.3V6K~N
1
2
C169
0.1U_0402_16V7K~N
1
2
R60 0_0402_5%
12
C148
0.1U_0402_16V7K~N
1
2
RP6
47_0804_8P4R_5%
18
27
36
45
R61 0_0402_5%
12
C150
0.1U_0402_16V7K~N
1
2
C170
0.1U_0402_16V7K~N
1
2
C151
0.1U_0402_16V7K~N
1
2
C152
0.1U_0402_16V7K~N
1
2
C190
0.1U_0402_16V7K~N
1
2
C299
1000P_0402_50V7K~N
1
2
C179
0.1U_0402_16V7K~N
1
2
C193
0.1U_0402_16V7K~N
1
2
C154
0.1U_0402_16V7K~N
1
2
RP10
47_0804_8P4R_5%
18
27
36
45
RP14
47_0804_8P4R_5%
18
27
36
45
C133
4.7U_0805_6.3V6K~N
1
2
RP5
47_0804_8P4R_5%
18
27
36
45
C141
0.1U_0402_16V7K~N
1
2
C136
0.1U_0402_16V7K~N
1
2
C281
0.1U_0402_16V7K~N
1
2
C138
0.1U_0402_16V7K~N
1
2
R152
1K_0402_1%
1 2
RP2
47_0804_8P4R_5%
18
27
36
45
C194
0.1U_0402_16V7K~N
1
2
C137
0.1U_0402_16V7K~N
1
2
JDIM1
FOX_ASOA426-M2RN-7F
CONN@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
VSS
2
DQ4
4
DQ5
6
VSS
8
DM0
10
VSS
12
DQ6
14
DQ7
16
VSS
18
DQ12
20
DQ13
22
VSS
24
DM1
26
VSS
28
CK0
30
CK0#
32
VSS
34
DQ14
36
DQ15
38
VSS
40
VSS
42
DQ20
44
DQ21
46
VSS
48
NC
50
DM2
52
VSS
54
DQ22
56
DQ23
58
VSS
60
DQ28
62
DQ29
64
VSS
66
DQS3#
68
DQS3
70
VSS
72
DQ30
74
DQ31
76
VSS
78
NC/CKE1
80
VDD
82
NC/A15
84
NC/A14
86
VDD
88
A11
90
A7
92
A6
94
VDD
96
A4
98
A2
100
A0
102
VDD
104
BA1
106
RAS#
108
S0#
110
VDD
112
ODT0
114
NC/A13
116
VDD
118
NC
120
VSS
122
DQ36
124
DQ37
126
VSS
128
DM4
130
VSS
132
DQ38
134
DQ39
136
VSS
138
DQ44
140
DQ45
142
VSS
144
DQS5#
146
DQS5
148
VSS
150
DQ46
152
DQ47
154
VSS
156
DQ52
158
DQ53
160
VSS
162
CK1
164
CK1#
166
VSS
168
DM6
170
VSS
172
DQ54
174
DQ55
176
VSS
178
DQ60
180
DQ61
182
VSS
184
DQS7#
186
DQS7
188
VSS
190
DQ62
192
DQ63
194
VSS
196
SA0
198
SA1
200
C134
0.1U_0402_16V7K~N
1
2
RP9
47_0804_8P4R_5%
18
27
36
45
C135
0.1U_0402_16V7K~N
1
2
C192
0.1U_0402_16V7K~N
1
2
C149
0.1U_0402_16V7K~N
1
2
C191
0.1U_0402_16V7K~N
1
2
RP1
47_0804_8P4R_5%
18
27
36
45
C171
0.1U_0402_16V7K~N
1
2
R135
1K_0402_1%
1 2
+
C147
330U_D2E_2.5VM
@
1
2
C142
0.1U_0402_16V7K~N
1
2
C218
0.1U_0402_16V7K~N
1
2
RP13
47_0804_8P4R_5%
18
27
36
45
C153
0.1U_0402_16V7K~N
1
2
C168
0.1U_0402_16V7K~N
1
2
C298
0.1U_0402_16V7K~N
1
2
C139
0.1U_0402_16V7K~N
1
2
C195
0.1U_0402_16V7K~N
1
2
C140
0.1U_0402_16V7K~N
1
2