TI DSP芯片选择全面指南：2008年版

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TI DSP芯片选择手册是一份专为电子工程设计师精心编撰的指南，旨在帮助他们根据实际应用需求挑选最适合的德州仪器（Texas Instruments, TI）数字信号处理器（DSP）、数字媒体处理器（DMP）、数字信号控制器（DSC）和应用处理器（AP）。这份2008年第二季度发布的文档详细介绍了TI在各个DSP平台上的产品系列，包括： 1. **TMS320C2000™ 控制器平台**：此平台提供了针对低功耗和高性能应用的控制器，如TMS320C28x系列，强调了控制和信号处理功能。 2. **TMS320C24x™ 控制器系列**：这一代控制器注重高效性和灵活性，适用于对实时性能要求高的场景。 3. **C2000™ 的电源管理产品**：手册还讨论了这些控制器平台上的节能解决方案，以优化能源利用。 4. **TMS320C5000™ DSP平台**：这是高性能和多核架构的代表，C55x和C54x系列是关键成员，同样关注电源管理。 5. **TMS320C6000™ DSP平台**：C64x系列展示了更高的运算速度，而C62x和C67x则提供了更广泛的性能范围。 6. **DaVinci™ 数字媒体处理器**：针对多媒体处理和混合信号应用，如DaVinci DM644x和DM643x系列，提供了集成的音频、视频处理能力。 7. **C645x DSP**：这部分详细阐述了C645x在复杂信号处理中的性能和特性。 8. **电源管理产品**：对于所有高级DSP平台，手册都包含了如何优化能源效率的重要信息。 9. **DaVinci Digital Media Technology**：这部分介绍了TI的多媒体技术，展示了其在处理音频、视频等多媒体数据的强大实力。 TI DSP芯片选择手册是一个全面的工具，不仅列出了各种产品的规格和技术特性，还提供了关于开发工具和软件支持的信息，以及关于产品生命周期和支援的说明。对于寻求在不同应用场景中选用合适的TI DSP的工程师来说，这是一份极其宝贵的参考资料。

Specifications

• Broadest portfolio of high-performance

DSPs ranging from $8.95 to 1.2 GHz

• Shipping the industry’s first 1.2-GHz

DSPs on a 90-nm process node

• Upward 100% object code compatibil-

ity within C6000™ DSP platform

• The easiest-to-use integrated develop-

ment environment with the in dustry’s

best optimizing C compiler

Applications

Wireless infrastructure (adaptive anten-

nas, basestations, gateways), telecom

infrastructure (RAS, PBX, VoIP), digital

video (conferencing, surveillance,

encoders, statistical remultiplexor/

broadband routers), imaging (medical,

machine vision/inspection, defense/

radar/sonar)

Features

• VelociTI.2 architecture extensions with

new instructions to accelerate per-

formance in key applications

• Increased parallelism with quad 16-bit

and octal 8-bit multiply-accumulate

performance

• Improved orthogonality with frequently

used instructions available in more

functional units

• Double the bandwidth resulting from

more registers, wider load/store data

paths and enlarged two-level cache

Peripherals

• Enhanced direct memory access

controller

• Peripheral component interconnect

• Universal test and operation PHY

interface for ATM (UTOPIA)

• Viterbi coprocessor

• Turbo coprocessor

• External memory interfaces

• Multi-channel buffered serial ports

• Host port interfaces

• Direct memory access controller

• 32-bit expansion bus

• Serial RapidIO

Texas Instruments 2Q 2008 Digital Signal Processing Selection Guide

TMS320C6000

™

DSP Platform

Silicon

➔

TMS320C64x™ DSP Generation, Fixed Point

Highest-Performance and Performance Value DSPs

Get samples, data sheets, tools and app reports at: www.ti.com/c6000

* Please check user guide for MUXing options.

McBSP

McASP

PWM ×3

UART ×2

OSC

PLL

JTAG

DDR

PLL

Timer

WDT

EDMA 3.0

DDR2 32

DSP Subsystem

128-KB

Cache

L1D 80 KB

GPIO

Timer ×2

I C

EMIF 16

HPI

RMII

PCI 33

C64x+™

Core

L1P 32 KB

VLYNQ™

RMII/MII

The C642x DSPs come in two flavors – the C6421 and C6424 DSPs. These DSPs are pin-for-pin

compatible, start from U.S. $8.95 (10 KU volumes), and are completely scalable in speed and/or

feature set. Both new DSPs are available in 400, 500 and 600 MHz speeds, and have the same raw

processing power, but differ in on-chip memory and peripherals.

Software Compatible

Increasing Performance, Memory & Peripherals

Floating Point

Performance Value

Video Application Specific

Highest Performance

C62x™

Devices

C67x™

Devices

C64x

Devices

DM64x™

Devices

C64x™

Devices

C6000™ DSP Platform Roadmap

The C6000 DSP platform includes a wide range of devices that raise the bar in performance, set

new levels of cost efficiency and offer on-chip peripheral integration to enable developers of high-

performance systems to choose the device that best suits their specific application.

Texas Instruments 2Q 2008 Digital Signal Processing Selection Guide

TMS320C6000

™

DSP Platform

Silicon

➔

TMS320C64x™ DSP Generation – Performance Value Fixed-Point DSPs

Internal RAM (Bytes)

L1 Program Cache/ Enhanced Power (W)

L1 Data Cache/ DMA CPU Voltage (V) 100-U

Part Number

L2 Unified RAM/Cache

McBSP (Channels) COM Timers MHz MIPS and L1 Total Core I/O Packaging Price

Performance Value

TMS320C6410GTS400 16K/16K/128K 2 64 HPI 32/16

3 400 3200 0.58 1.0 1.2 3.3 288 BGA, 23 mm 19.65

TMS320C6413GTS500 16K/16K/256K 2 64 HPI 32/16

3 500 4000 0.58 1.1 1.2 3.3 288 BGA, 23 mm 28.40

TMS320C6412AGDK5 16K/16K/256K 2 64 PCI/HPI/EMAC

3 500 4000 0.66 1.3 1.2 3.3 548 BGA, 23 mm 41.85

TMS320C6412AGDK6 16K/16K/256K 2 64 PCI/HPI/EMAC

3 600 4800 0.93 1.9 1.4 3.3 548 BGA, 23 mm 46.05

TMS320C6412AGDK7 16K/16K/256K 2 64 PCI/HPI/EMAC

3 720 5760 0.93 2.15 1.4 3.3 548 BGA, 23 mm 72.00

TMS320C6418GTS600 16K/16K/512K 2 64 HPI 32/16

3 600 4800

0.82 1.7 1.4 3.3 288 BGA, 23 mm 52.85

TMS320C6418ZTSA500 16K/16K/512K 2 64 HPI 32/16

3 500 4000

0.58 1.1 1.4 3.3 288 BGA, 23 mm 52.85

TMS320C6424ZWT4 32K/80K/128K 2 64 PCI/HPI/EMAC

3 400 3200 TBD TBD 1.05/1.2 1.8/3.3 361 PBGA, 16 mm 20.95

TMS320C6424ZWT5 32K/80K/128K 2 64 PCI/HPI/EMAC

3 500 4000 TBD TBD 1.2 1.8/3.3 361 PBGA, 16 mm 26.15

TMS320C6424ZWTQ5

32K/80K/128K 2 64 PCI/HPI/EMAC

3 500 4000 TBD TBD 1.2 1.8/3.3 361 PBGA, 16 mm 31.40

TMS320C6424ZDUQ5

32K/80K/128K 2 64 PCI/HPI/EMAC

3 500 4000 TBD TBD 1.2 1.8/3.3 376 PBGA, 23 mm 31.40

TMS320C6424ZWT6 32K/80K/128K 2 64 PCI/HPI/EMAC

3 600 4800 TBD TBD 1.2 1.8/3.3 361 PBGA, 16 mm 32.85

TMS320C6421ZWT4 48K/16K/64K 1 64 HPI/EMAC

3 400 3200 TBD TBD 1.05/1.2 1.8/3.3 361 PBGA, 16 mm 11.75

TMS320C6421ZWT5 48K/16K/64K 1 64 HPI/EMAC

3 500 4000 TBD TBD 1.2 1.8/3.3 361 PBGA, 16 mm 15.75

TMS320C6421ZWTQ5

48K/16K/64K 1 64 HPI/EMAC6 3 500 4000 TBD TBD 1.2 1.8/3.3 361 PBGA, 16 mm 18.80

TMS320C6421ZDUQ5 48K/16K/64K 1 64 HPI/EMAC6 3 500 4000 TBD TBD 1.2 1.8/3.3 376 PBGA, 23 mm 18.80

TMS320C6421ZWT6 48K/16K/64K 1 64 HPI/EMAC

3 600 4800 TBD TBD 1.2 1.8/3.3 361 PBGA, 16 mm 22.30

Prices are quoted in U.S. dollars and represent year 2008 suggested resale pricing. All prices are subject to change. Customers are advised to obtain New devices are listed in red.

the most current and complete pricing information from TI prior to placing orders. TI may verify final pricing prior to accepting any order.

Assumes 60% CPU utilization, 50% EMIF utilization (133 MHz for 1.4 V, 100 MHz for 1.2 V), 50% writes, 64-bits, 50% bit switching, 2 2-MHz McBSP at 100% utilization, and 2 75-MHz timers at 100% utilization.

See SPRAA59 for the TMS320C6410 and TMS320C6413 DSPs. See SPRA967 for the TMS320C6412A DSP. See SPRAA60 for the TMS320C6418 DSP.

HPI is selectable, 32 bit or 16 bit.

The C6412 can be configured to have either a 32-bit PCI or 32-bit HPI, or a 16-bit HPI with Ethernet MAC.

Plus on-chip VITERBI (VCP) coprocessor.

HPI interface is 16 bit.

Q designates Q100 automotive reliability.

Note: Check

www.ti.com for extended temperature and packaging options. Additional information on enhanced plastic and HiRel DSP versions is available on page 64.

TMS320C64x™ DSP Generation – Highest-Performance Fixed-Point DSPs

Internal RAM (Bytes)

L1 Program Cache/ Enhanced Power (W)

L1 Data Cache/ DMA CPU Voltage (V) 100-U

Part Number

L2 Unified RAM/Cache

McBSP (Channels) COM

Timers MHz MIPS and L1 Total Core I/O Packaging Price

Highest Performance

TMS320C6416TBGLZ1 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 1000 8000

0.44 1.65 1.2 3.3 532 BGA, 23 mm 246.55

TMS320C6416TGLZ8 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 850 6800

TBD TBD 1.2 3.3 532 BGA, 23 mm 191.90

TMS320C6416TBGLZ7 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 720 5760

0.44 1.36 1.2 3.3 532 BGA, 23 mm 123.80

TMS320C6416TGLZ6 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 600 4800

0.39 1.1 1.1 3.3 532 BGA, 23 mm 104.30

TMS320C6415TBGLZ1 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 1000 8000 0.44 1.65 1.2 3.3 532 BGA, 23 mm 219.60

TMS320C6415TBGLZ8 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 850 6800 TBD TBD 1.2 3.3 532 BGA, 23 mm 165.60

TMS320C6415TBGLZ7 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 720 5760 0.44 1.36 1.2 3.3 532 BGA, 23 mm 112.50

TMS320C6415TBGLZ6 16K/16K/1M 2+Utopia

64 PCI/HPI 32/16 3 600 4800 0.39 1.1 1.1 3.3 532 BGA, 23 mm 90.00

TMS320C6414TBGLZ1 16K/16K/1M 3 64 HPI 32/16 3 1000 8000 0.44 1.65 1.2 3.3 532 BGA, 23 mm 207.85

TMS320C6414TBGLZ8 16K/16K/1M 3 64 HPI 32/16 3 850 6800 TBD TBD 1.2 3.3 532 BGA, 23 mm 157.40

TMS320C6414TBGLZ7 16K/16K/1M 3 64 HPI 32/16 3 720 5760 0.44 1.36 1.2 3.3 532 BGA, 23 mm 106.95

TMS320C6414TBGLZ6 16K/16K/1M 3 64 HPI 32/16 3 600 4800 0.39 1.1 1.1 3.3 532 BGA, 23 mm 85.55

Prices are quoted in U.S. dollars and represent year 2008 suggested resale pricing. All prices are subject to change. Customers are advised to obtain the most current and complete pricing information from TI prior

to placing orders. TI may verify final pricing prior to accepting any order.

See SPRAA45 for TMS320C6414T, TMS320C6415T and TMS320C6416T DSPs.

HPI is selectable, 32 bit or 16 bit.

UTOPIA pins muxed with a second McBSP.

Plus on-chip Turbo (TCP) and VITERBI (VCP) coprocessors.

Note: Check

www.ti.com for extended temperature and packaging options. Additional information on enhanced plastic and HiRel DSP versions is available on page 64.

Texas Instruments 2Q 2008 Digital Signal Processing Selection Guide

TMS320C6000

™

DSP Platform

Silicon

➔

DaVinci™ Digital Media Processors

L1/ L2/ External Program/

Frequency SRAM SRAM ROM Memory Video Ports Serial Connectivity Data Voltage (V) 100-U

Device CPU (MHz) (Bytes) (Bytes) (Bytes) I/F EDMA (Configurable) I/F I/F Storage Core I/O Packaging Price

TMS320DM6446ZWT C64x+, 594 112 K 64 K 16 K 1 16-/8-Bit 64 Ch 1 Input, ASP, I

C, USB 2.0, Async SRAM, 1.2 1.8/ 361 BGA, 43.50

ARM9, (DSP) (DSP) (DSP) (ARM) EMIFA 1 Output SPI, VLYNQ™, DDR2 SDRAM, 3.3 16 × 16 mm

DaVinci 297 40 K 1 32-/16-Bit 3 UARTs 10/100 EMAC NAND Flash,

Video (ARM) (ARM) DDR2 SmartMedia/xD

TMS320DM6443ZWT C64x+, 594 112 K 64 K 16 K 1 16-/8-Bit 64 Ch 1 Output ASP, I

C, USB 2.0, Async SRAM, 1.2 1.8/ 361 BGA, 37.40

ARM9, (DSP) (DSP) (DSP) (ARM) EMIFA SPI, VLYNQ, DDR2 SDRAM, 3.3 16 × 16 mm

DaVinci 297 40 K 1 32-/16-Bit 3 UARTs 10/100 EMAC NAND Flash,

Video (ARM) (ARM) DDR2 SmartMedia/xD

TMS320DM6441ZWT C64x+, 513/405 112 K 64 K 16 K 1 16-/8-Bit 64 Ch 1 Input, ASP, I

C, USB 2.0, Async SRAM, 1.2/ 1.8/ 361 BGA, 37.75

ARM9, (DSP) (DSP) (DSP) (ARM) EMIFA 1 Output SPI, VLYNQ, DDR2 SDRAM, 1.05 3.3 16 × 16 mm

DaVinci 256/202 40 K 1 32-/16-Bit 3 UARTs 10/100 EMAC NAND Flash,

Video (ARM) (ARM) DDR2 SmartMedia/xD

TMS320DM6431ZWT3 C64x+, 300 64 K 64 K 64 K 1 8-Bit 64 Ch 1 Input McASP, I

C, 10/100 EMAC Async SRAM, 1.2 1.8/ 361 PBGA 13.10

TMS320DM6431ZWTQ3

DaVinci EMIFA, 1 UART, DDR2 SDRAM, 3.3 16 × 16 mm, 14.40

TMS320DM6431ZDU3 Video 1 16-Bit 1 McBSP, NAND Flash 376 BGA 13.10

TMS320DM6431ZDUQ3

DDR2 1 HECC 23 × 23 mm 14.40

TMS320DM6433ZWT4 C64x+, 400 112 K 128 K 64 K 1 8-Bit 64 Ch 1 Output McASP, 32-Bit PCI, Async SRAM, 1.05/ 1.8/ 361 PBGA 18.35

TMS320DM6433ZWT5 DaVinci 500 EMIFA, 1 McBSP, VLYNQ, DDR2 SDRAM, 1.2 3.3 16 × 16 mm, 19.40

TMS320DM6433ZWTQ5

Video

500

1 16-/32-Bit I

C, 10/100 EMAC, NAND Flash

21.60

TMS320DM6433ZWT6 600 DDR2 1 UART 16-Bit HPI 21.60

TMS320DM6433ZDU4 400 376 BGA 18.35

TMS320DM6433ZDU5 500 23 × 23 mm 19.40

TMS320DM6433ZDUQ5

500 21.60

TMS320DM6433ZDU6 600 21.60

TMS320DM6435ZWT4 C64x+, 400 112 K 128 K 64 K 1 8-Bit 64 Ch 1 Input McASP, I

C, VLYNQ, Async SRAM, 1.05/ 1.8/ 361 PBGA 18.95

TMS320DM6435ZWTQ4

400 EMIFA, 1 McBSP, 10/100 EMAC, DDR2 SDRAM, 1.2 3.3 16 × 16 mm, 20.10

TMS320DM6435ZWT5 DaVinci 500 1 16-/32-Bit 2 UARTs, 16-Bit HPI NAND Flash 20.10

TMS320DM6435ZWTQ5

500

DDR2 1 HECC 22.35

TMS320DM6435ZWT6 Video 600 22.35

TMS320DM6435ZDU4 400 376 BGA 18.95

TMS320DM6435ZDUQ4

400 23 × 23 mm 20.10

TMS320DM6435ZDU5 500 20.10

TMS320DM6435ZDUQ5

500 22.35

TMS320DM6435ZDU6 600 22.35

TMS320DM6437ZWT4 C64x+, 400 112K 128 K 64 K 1 8-Bit 64 Ch 1 Input, McASP, I

C, 32-Bit PCI, Async SRAM, 1.05/ 1.8/ 361 PBGA 24.35

TMS320DM6437ZWTQ4

DaVinci 400 EMIFA, 1 Output 1 HECC VLYNQ, DDR2 SDRAM, 1.2 3.3 16 × 16 mm, 25.85

TMS320DM6437ZWT5 Video 500 1 16-/32-Bit 2 McBSPs

, 10/100 EMAC, NAND Flash 25.85

TMS320DM6437ZWTQ5

500 DDR2 2 UARTs 16-Bit HPI 28.75

TMS320DM6437ZWT6 600 28.75

TMS320DM6437ZDU4 400 376 BGA 24.35

TMS320DM6437ZDUQ4

400 23 × 23 mm 25.85

TMS320DM6437ZDU5 500 25.85

TMS320DM6437ZDUQ5

500 28.75

TMS320DM6437ZDU6 600 28.75

Prices are quoted in U.S. dollars and represent year 2008 suggested resale pricing. All prices are subject to change. Customers are advised to obtain New devices are listed in red.

the most current and complete pricing information from TI prior to placing orders. TI may verify final pricing prior to accepting any order.

McBSP can be configured as an SPI peripheral

Q designates Q100 automotive reliability.

Texas Instruments 2Q 2008 Digital Signal Processing Selection Guide

TMS320C6000

™

DSP Platform

Silicon

➔

DaVinci™ Digital Media Processors (Continued)

L1/ L2/ External Program/

Frequency SRAM SRAM ROM Memory Video Ports Serial Connectivity Data Voltage (V) 100-U

Device CPU (MHz) (Bytes) (Bytes) (Bytes) I/F EDMA (Configurable) I/F I/F Storage Core I/O Packaging Price

TMX320DM6467ZUT C64x+, 594 64K 128K 8K 1 16-/8-Bit 64 Ch 1 Video Port [config. for 2 McASPs, 32-Bit PCI Async SRAM, 1.2 1.8/ 529 BGA 87.58

ARM9 (DSP) (DSP) (DSP) (ARM) EMIFA, dual 8-bit SD (BT.565), I

C, (33 MHz), DDR2 SDRAM, 3.3 19 × 19 mm

DaVinci 297 56K 1 32-/16-Bit single 16-bit HD (BT.1120), SPI, USB 2.0, PHY, Smart Media/

HD (ARM) (ARM) DDR2 or single 8-/10-/12-bit raw 3 UARTs VLYNQ, SSFDC/xD,

Video capture chs]. 1 Video Port (with IrDA 10/100/1000 NAND Flash,

[config. for dual 8-bit SD and CIR EMAC, (w/ NOR Flash

(BT.565) or single

16-bit HD support) MII, GMII, &

(BT.1120) display

chs].

MDIO

2 Transport

Stream I/F for support)

MPEG Transport Stream. 32-/16-Bit HPI

1 VDCE for Horz./Vert.

Downscaling, Chroma

Conversion, Edge Padding

& Anti-Alias Filtering

TMX320DM355ZCE216 ARM9, 216 – – 8K 1 16-/8-Bit 64 Ch 1 Input, 3 SPI, USB 2.0 HS Async SRAM, 1.3 1.8/ 329 BGA 16.51

TMX320DM355ZCE270 DaVinci 270 EMIFA, 1 Output 2 ASP, MDDR/DDR2 3.3 13 × 13 mm 19.58

Video 1 16-Bit 3 UARTs, SDRAM,

MDDR/DDR2

C NAND Flash,

SmartMedia/xD

TMS320DM647ZUT7 C64x+, 720 32K/32K 256K 64K 1 16-/8-Bit 64 Ch 5 Video Ports 1 I

C, PCI/HPI, Async SRAM, 1.2/ 1.8/ 529 nFBGA 52.33

TMS320DM647ZUT9 DaVinci 900 EMIFA

(Each configurable as 1 SPI, VLYNQ, DDR2 SDRAM, 1.2 3.3 19 × 19 mm 73.28

Video 1 32-/16-Bit dual capture, single 1 UART, 10/100/1000 NAND Flash,

DDR2

capture, display, TSI

1 McASP 3-pt Ethernet NOR Flash

capture)

Switch Subsys

w/ 1 SGMII Pt

TMS320DM648ZUT7 C64x+, 720 32K/32K 512K 64K 1 16-/8-Bit 64 Ch 5 Video Ports 2 I

C, PCI/HPI, Async SRAM, 1.2/ 1.8/ 529 nFBGA 65.43

TMS320DM648ZUT9 DaVinci 900 EMIFA

(Each configurable as 1 SPI, VLYNQ, DDR2 SDRAM, 1.2 3.3 19 × 19 mm 86.39

Video 1 32-/16-Bit dual capture, single 1 UART, 10/100/1000 NAND Flash,

DDR2

capture, display, TSI

1 McASP 3-pt Ethernet NOR Flash

capture) 2 TSIP

Switch Subsys

w/ 2 SGMII Pts

Prices are quoted in U.S. dollars and represent year 2008 suggested resale pricing. All prices are subject to change. Customers are advised to obtain New devices are listed in red.

the most current and complete pricing information from TI prior to placing orders. TI may verify final pricing prior to accepting any order.

EMIFA does not support SDRAM.

TMS320DM64x™ DSP Generation – Video Application-Specific Fixed-Point DSPs

Internal RAM (Bytes)

L1 Program Cache/ Enhanced Power (W)

L1 Data Cache/ Video DMA CPU Voltage (V) 100-U

Part Number

L2 Unified RAM/Cache

Ports McBSP (Channels) COM

Timers MHz MIPS and L1

Total

Core I/O Packaging Price

Video Application Specific

TMS320DM640

GDK4 16K/16K/128K 1 8-bit 2 64 EMAC 3 400 3200 0.66 1.15 1.2 3.3 548 BGA, 23 mm 24.82

TMS320DM640AGNZ4 16K/16K/128K 1 8-bit 2 64 EMAC 3 400 3200 0.66 1.15 1.2 3.3 548 BGA, 27 mm 24.82

TMS320DM641AGDK5 16K/16K/128K 2 8-bit 2 64 HPI 16/EMAC 3 500 4000 0.66 1.30 1.2 3.3 548 BGA, 23 mm 30.59

TMS320DM641AGNZ5 16K/16K/128K 2 8-bit 2 64 HPI 16/EMAC 3 500 4000 0.66 1.30 1.2 3.3 548 BGA, 27 mm 30.59

TMS320DM641AGDK6 16K/16K/128K 2 8-bit 2 64 HPI 16/EMAC 3 600 4800 0.93 1.90 1.4 3.3 548 BGA, 23 mm 33.64

TMS320DM641AGNZ6 16K/16K/128K 2 8-bit 2 64 HPI 16/EMAC 3 600 4800 0.93 1.90 1.4 3.3 548 BGA, 27 mm 33.64

TMS320DM643AGDK5 16K/16K/256K 2 20-bit 1 64 HPI 32/EMAC

3 500 4000 0.66 1.30 1.2 3.3 548 BGA, 23 mm 33.99

TMS320DM643AGNZ5 16K/16K/256K 2 20-bit 1 64 HPI 32/EMAC

3 500 4000 0.66 1.30 1.2 3.3 548 BGA, 27 mm 33.99

TMS320DM643AGDK6 16K/16K/256K 2 20-bit 1 64 HPI 32/EMAC

3 600 4800 0.93 1.90 1.4 3.3 548 BGA, 23 mm 37.20

TMS320DM643AGNZ6 16K/16K/256K 2 20-bit 1 64 HPI 32/EMAC

3 600 4800 0.93 1.90 1.4 3.3 548 BGA, 27 mm 37.20

TMS320DM642AGDK5 16K/16K/256K 3 20-bit 2

64 PCI/HPI 32/EMAC

3 500 4000 0.66 1.30 1.2 3.3 548 BGA, 23 mm 40.39

TMS320DM642AGNZ5 16K/16K/256K 3 20-bit 2

64 PCI/HPI 32/EMAC

3 500 4000 0.66 1.30 1.2 3.3 548 BGA, 27 mm 40.39

TMS320DM642AGDK6 16K/16K/256K 3 20-bit 2

64 PCI/HPI 32/EMAC

3 600 4800 0.93 1.90 1.4 3.3 548 BGA, 23 mm 44.44

TMS320DM642AGNZ6 16K/16K/256K 3 20-bit 2

64 PCI/HPI 32/EMAC

3 600 4800 0.93 1.90 1.4 3.3 548 BGA, 27 mm 44.44

TMS320DM642AGDK7 16K/16K/256K 3 20-bit 2

64 PCI/HPI 32/EMAC

3 720 5760 0.93 2.15 1.4 3.3 548 BGA, 23 mm 62.41

TMS320DM642AGNZ7 16K/16K/256K 3 20-bit 2

64 PCI/HPI 32/EMAC

3 720 5760 0.93 2.15 1.4 3.3 548 BGA, 27 mm 62.41

to placing orders. TI may verify final pricing prior to accepting any order.

HPI is selectable, 32-bit or 16-bit.

Assumes 60% CPU utilization.

Assumes 60% CPU utilization, 50% EMIF utilization (133 MHz for 1.4 V, 100 MHz for 1.2 V), 50% writes, 64-bits, 50% bit switching, 2 2-MHz McBSP at 100% utilization, and 2 50-MHz timers at 100% utilization.

See SPRA962.

The DM642 can be configured to have up to three serial ports in various video/McASP/McBSP combinations.

The DM640 has an Ethernet MAC. The DM641 can be configured to have either a 16-bit HPI or Ethernet MAC. The DM643 can be configured to have either a 32-bit HPI or a 16-bit HPI and Ethernet MAC. The

DM642 can be configured to have either a 32-bit PCI or 32-bit HPI or a 16-bit HPI and Ethernet MAC.

Note: Check

www.ti.com for extended temperature and packaging options. Additional information on enhanced plastic and HiRel DSP versions is available on page 64.

Texas Instruments 2Q 2008 Digital Signal Processing Selection Guide

TMS320C6000

™

DSP Platform

Silicon

➔

Video

TMS320DM642

Port 0

C64x™

DSP Core

10/100 EMAC

66-MHz PCI

64-Bit EMIF

L1P Cache

16 KBytes

L2 Cache Memory 256 KBytes

Enhanced DMA Controller

L1D Cache

16 KBytes

Video

Port 1

Video

Port 2

McASP

32-Bit HPI

2 McBSPs

Timer 0/1/2

VCXO

Interpolated

Control (VIC)

The TMS320DM64x digital media proces-

sors are optimized for video and include a

range of high-performance and low-cost

options. The TMS320DM64x generation of

digital media processors are fully

programmable and offer industry-leading

performance for the most demanding

streaming multimedia applications.

In addition, TI offers a wide range of com-

plementary analog parts, easy-to-use

development tools, extensive video and

imaging third-party algorithms and more.

TMS320DM64x™ Digital Media Processors

TMS320DM642 DSP Block Diagram

The TMS320DM64x digital media

processors give designers the

industry's most powerful, flexible and

easy-to-use solutions for high-

performance digital media

applications.

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