V
SD
GND
D
S
V
GND
Digital Supply:
Analog Supply:
t
1
: 0s minimum delay between Digital Supply and Analog Supply.
t
1
9
BUF20800-Q1
www.ti.com.cn
ZHCS348C –AUGUST 2011–REVISED AUGUST 2018
Copyright © 2011–2018, Texas Instruments Incorporated
7 Detailed Description
7.1 Overview
The BUF20800-Q1 programmable voltage reference allows fast, easy adjustment of 18 programmable reference
outputs and two channels for V
COM
adjustment, each with 10-bit resolution. It offers very simple, time-efficient
adjustment of the gamma reference and V
COM
voltages. The BUF20800-Q1 is programmed through a high-
speed, standard, two-wire interface. The BUF20800-Q1 features a double-register structure for each DAC
channel to simplify the implementation of dynamic gamma control. This structure allows pre-loading of register
data and rapid updating of all channels simultaneously.
Buffers 1−9 are able to swing to within 200mV of the positive supply rail, and to within 0.6V of the negative
supply rail. Buffers 10−18 are able to swing to within 0.8V of the positive supply rail and to within 200mV of the
negative supply rail.
The BUF20800-Q1 can be powered using an analog supply voltage from 7V to 18V, and a digital supply from 2V
to 5.5V. The digital supply must be applied prior to or simultaneously with the analog supply to avoid excessive
current and power consumption; damage to the device may occur if it is left connected only to the analog supply
for extended periods of time. Figure 7 shows the power supply timing requirements.
Figure 7. Power Supply Timing Requirements
Figure 14 shows the BUF20800-Q1 in a typical configuration. In this configuration, the BUF20800-Q1 device
address is 74h. The output of each digital-to-analog converter (DAC) is immediately updated as soon as data are
received in the corresponding register (LD = 0).
For maximum dynamic range, set V
REFH
= V
S
− 0.2 V and V
REFL
= GND + 0.2 V.