博通BCM4335：集成5G WiFi、蓝牙及FM的单片无线解决方案

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CONFIDENTIAL FOR ALEN HUANG AT ALLTEK TECHNOLOGY CORPORATION

10/14/2013 MULD2

BROADCOM

August 2, 2013 • 4335-DS111-R Page 16

BCM4335 Preliminary Data Sheet

BROADCOM CONFIDENTIAL

Section 13:Pinout and Signal Descriptions..................................................................... 100

Ball Maps............................................................................................................................................ 100

Pin Lists .............................................................................................................................................. 103

Signal Descriptions.............................................................................................................................. 112

WLAN GPIO Signals and Strapping Options .........................................................................................122

Multiplexed Bluetooth GPIO Signals ..................................................................................................124

GPIO/SDIO Alternative Signal Functions ............................................................................................. 126

I/O States ........................................................................................................................................... 127

Section 14:DC Characteristics ........................................................................................ 131

Absolute Maximum Ratings ................................................................................................................131

Environmental Ratings........................................................................................................................ 132

Electrostatic Discharge Specifications ................................................................................................. 132

Recommended Operating Conditions and DC Characteristics .............................................................. 133

Section 15:Bluetooth RF Specifications.......................................................................... 135

Section 16:FM Receiver Specifications........................................................................... 142

Section 17:WLAN RF Specifications................................................................................ 147

Introduction ....................................................................................................................................... 147

2.4 GHz Band General RF Specifications ..............................................................................................148

WLAN 2.4 GHz Receiver Performance Specifications ........................................................................... 149

WLAN 2.4 GHz Transmitter Performance Specifications ...................................................................... 153

WLAN 5 GHz Receiver Performance Specifications .............................................................................. 155

WLAN 5 GHz Transmitter Performance Specifications ......................................................................... 159

General Spurious Emissions Specifications .......................................................................................... 160

Section 18:Internal Regulator Electrical Specifications................................................... 161

Core Buck Switching Regulator ........................................................................................................... 161

3.3V LDO (LDO3P3) ............................................................................................................................. 162

2.5V LDO (BTLDO2P5) ......................................................................................................................... 163

CLDO ..................................................................................................................................................164

LNLDO ................................................................................................................................................ 165

Section 19:System Power Consumption ........................................................................ 166

WLAN Current Consumption ............................................................................................................... 166

Bluetooth and FM Current Consumption ............................................................................................168

Section 20:Interface Timing and AC Characteristics ....................................................... 169

SDIO/gSPI Timing................................................................................................................................ 169

SDIO Default Mode Timing .................................................................................................................169

CONFIDENTIAL FOR ALEN HUANG AT ALLTEK TECHNOLOGY CORPORATION

10/14/2013 MULD2

BROADCOM

August 2, 2013 • 4335-DS111-R Page 17

BCM4335 Preliminary Data Sheet

BROADCOM CONFIDENTIAL

SDIO High-Speed Mode Timing...........................................................................................................171

SDIO Bus Timing Specifications in SDR Modes...................................................................................172

Clock Timing..................................................................................................................................172

Device Input Timing ......................................................................................................................173

Device Output Timing ...................................................................................................................174

SDIO Bus Timing Specifications in DDR50 Mode................................................................................176

Data Timing, DDR50 Mode ...........................................................................................................177

gSPI Signal Timing................................................................................................................................178

HSIC Interface Specifications............................................................................................................... 179

PCI Express Interface Parameters........................................................................................................180

JTAG Timing........................................................................................................................................ 182

Section 21:Power-Up Sequence and Timing................................................................... 183

Sequencing of Reset and Regulator Control Signals............................................................................. 183

Description of Control Signals.............................................................................................................183

Control Signal Timing Diagrams..........................................................................................................184

Section 22:Package Information .................................................................................... 186

Package Thermal Characteristics.........................................................................................................186

Junction Temperature Estimation and PSI

Versus THETA

............................................................... 186

Environmental Characteristics ............................................................................................................ 186

Section 23:Mechanical Information............................................................................... 187

Section 24:Ordering Information................................................................................... 192

CONFIDENTIAL FOR ALEN HUANG AT ALLTEK TECHNOLOGY CORPORATION

10/14/2013 MULD2

BROADCOM

August 2, 2013 • 4335-DS111-R Page 18

BCM4335 Preliminary Data Sheet

BROADCOM CONFIDENTIAL

List of Figures

Figure 1: Functional Block Diagram....................................................................................................................1

Figure 2: BCM4335 Block Diagram ...................................................................................................................25

Figure 3: Typical Power Topology.....................................................................................................................30

Figure 4: Recommended Oscillator Configuration ...........................................................................................34

Figure 5: Recommended Circuit to Use with an External Reference Clock......................................................35

Figure 6: Startup Signaling Sequence ...............................................................................................................46

Figure 7: CVSD Decoder Output Waveform Without PLC ................................................................................48

Figure 8: CVSD Decoder Output Waveform After Applying PLC ......................................................................48

Figure 9: Functional Multiplex Data Diagram...................................................................................................54

Figure 10: PCM Timing Diagram (Short Frame Sync, Master Mode)................................................................55

Figure 11: PCM Timing Diagram (Short Frame Sync, Slave Mode)...................................................................56

Figure 12: PCM Timing Diagram (Long Frame Sync, Master Mode).................................................................57

Figure 13: PCM Timing Diagram (Long Frame Sync, Slave Mode)....................................................................58

Figure 14: PCM Burst Mode Timing (Receive Only, Short Frame Sync) ...........................................................59

Figure 15: PCM Burst Mode Timing (Receive Only, Long Frame Sync) ............................................................60

Figure 16: USB Compounded Device Configuration.........................................................................................61

Figure 17: USB Full-Speed Timing.....................................................................................................................63

Figure 18: UART Timing ....................................................................................................................................65

Figure 19: I

S Transmitter Timing.....................................................................................................................68

Figure 20: I

S Receiver Timing..........................................................................................................................68

Figure 21: Example Blend/Switch Usage..........................................................................................................71

Figure 22: Example Blend/Switch Separation ..................................................................................................72

Figure 23: Example Soft Mute Characteristic ...................................................................................................73

Figure 24: Broadcom GCI or BT-SIG Mode LTE Coexistence Interface .............................................................76

Figure 25: Signal Connections to SDIO Host (SD 4-Bit Mode) ..........................................................................79

Figure 26: Signal Connections to SDIO Host (SD 1-Bit Mode) ..........................................................................79

Figure 27: Signal Connections to SDIO Host (gSPI Mode) ................................................................................80

Figure 28: gSPI Write Protocol .........................................................................................................................81

Figure 29: gSPI Read Protocol ..........................................................................................................................81

Figure 30: gSPI Command Structure.................................................................................................................82

Figure 31: gSPI Signal Timing Without Status (32-bit Big Endian) ....................................................................83

Figure 32: gSPI Signal Timing with Status (Response Delay = 0; 32-bit Big Endian) .........................................84

Figure 33: WLAN Boot-Up Sequence................................................................................................................87

Figure 34: HSIC Device Block Diagram..............................................................................................................88

Figure 35: PCI Express Layer Model .................................................................................................................89

CONFIDENTIAL FOR ALEN HUANG AT ALLTEK TECHNOLOGY CORPORATION

10/14/2013 MULD2

BROADCOM

August 2, 2013 • 4335-DS111-R Page 19

BCM4335 Preliminary Data Sheet

BROADCOM CONFIDENTIAL

Figure 36: WLAN MAC Architecture.................................................................................................................92

Figure 37: WLAN PHY Block Diagram ...............................................................................................................97

Figure 38: Radio Functional Block Diagram......................................................................................................99

Figure 39: 160-Ball FCFBGA (Top View)..........................................................................................................100

Figure 40: 145-Ball WLBGA (Top View) ..........................................................................................................101

Figure 41: 286-Bump WLCSP (Bottom View)..................................................................................................102

Figure 42: Port Locations for Bluetooth Testing.............................................................................................135

Figure 43: Port Locations Showing Optional ePA and eLNA (Applies to 2.4 GHz and 5 GHz).........................147

Figure 44: SDIO Bus Timing (Default Mode)...................................................................................................169

Figure 45: SDIO Bus Timing (High-Speed Mode) ............................................................................................171

Figure 46: SDIO Clock Timing (SDR Modes)....................................................................................................172

Figure 47: SDIO Bus Input Timing (SDR Modes) .............................................................................................173

Figure 48: SDIO Bus Output Timing (SDR Modes up to 100 MHz)..................................................................174

Figure 49: SDIO Bus Output Timing (SDR Modes 100 MHz to 208 MHz) .......................................................174

Figure 50: ΔtOP Consideration for Variable Data Window (SDR 104 Mode) .................................................175

Figure 51: SDIO Clock Timing (DDR50 Mode).................................................................................................176

Figure 52: SDIO Data Timing (DDR50 Mode)..................................................................................................177

Figure 53: gSPI Timing ....................................................................................................................................178

Figure 54: WLAN = ON, Bluetooth = ON.........................................................................................................184

Figure 55: WLAN = OFF, Bluetooth = OFF.......................................................................................................184

Figure 56: WLAN = ON, Bluetooth = OFF........................................................................................................185

Figure 57: WLAN = OFF, Bluetooth = ON........................................................................................................185

Figure 58: 160-Ball FCFBGA Package Mechanical Information ......................................................................187

Figure 59: 145-Ball WLBGA Package Mechanical Information.......................................................................188

Figure 60: WLBGA Keep-out Areas for PCB Layout—Bottom View with Balls Facing Up ..............................189

Figure 61: 286-Bump WLCSP Package Mechanical Information ....................................................................190

Figure 62: WLCSP Keep-out Areas for PCB Layout—Bottom View with Bumps Facing Up............................191

CONFIDENTIAL FOR ALEN HUANG AT ALLTEK TECHNOLOGY CORPORATION

10/14/2013 MULD2

BROADCOM

August 2, 2013 • 4335-DS111-R Page 20

BCM4335 Preliminary Data Sheet

BROADCOM CONFIDENTIAL

List of Tables

Table 1: Power-Up/Power-Down/Reset Control Signals..................................................................................33

Table 2: Crystal Oscillator and External Clock—Requirements and Performance ..........................................35

Table 3: External 32.768 kHz Sleep Clock Specifications..................................................................................38

Table 4: Power Control Pin Description ...........................................................................................................45

Table 5: SPI to UART Signal Mapping ...............................................................................................................52

Table 6: PCM Interface Timing Specifications (Short Frame Sync, Master Mode)...........................................55

Table 7: PCM Interface Timing Specifications (Short Frame Sync, Slave Mode) ..............................................56

Table 8: PCM Interface Timing Specifications (Long Frame Sync, Master Mode)............................................57

Table 9: PCM Interface Timing Specifications (Long Frame Sync, Slave Mode) ...............................................58

Table 10: PCM Burst Mode (Receive Only, Short Frame Sync) ........................................................................59

Table 11: PCM Burst Mode (Receive Only, Long Frame Sync) .........................................................................60

Table 12: USB Full-Speed Timing Specifications...............................................................................................63

Table 13: Example of Common Baud Rates......................................................................................................64

Table 14: UART Timing Specifications ..............................................................................................................65

Table 15: Timing for I

S Transmitters and Receivers........................................................................................67

Table 16: SDIO Pin Description.........................................................................................................................79

Table 17: gSPI Status Field Details....................................................................................................................84

Table 18: gSPI Registers....................................................................................................................................85

Table 19: 286-Bump WLCSP Coordinates......................................................................................................103

Table 20: FCFBGA, WLBGA, and WLCSP Signal Descriptions..........................................................................112

Table 21: WLAN GPIO Functions and Strapping Options ...............................................................................122

Table 22: SDIO/gSPI I/O Voltage Selection (All Packages)..............................................................................122

Table 23: Host Interface Selection (FCBGA Package only) .............................................................................123

Table 24: Host Interface Selection (WLBGA and WLCSP Packages) ...............................................................123

Table 25: OTP/SPROM Select .........................................................................................................................123

Table 26: GPIO Multiplexing Matrix ...............................................................................................................124

Table 27: Multiplexed GPIO Signals................................................................................................................125

Table 28: GPIO/SDIO Alternative Signal Functions .......................................................................................126

Table 29: I/O States ........................................................................................................................................127

Table 30: Absolute Maximum Ratings............................................................................................................131

Table 31: Environmental Ratings....................................................................................................................132

Table 32: ESD Specifications...........................................................................................................................132

Table 33: Recommended Operating Conditions and DC Characteristics .......................................................133

Table 34: Bluetooth Receiver RF Specifications .............................................................................................136

Table 35: Bluetooth Transmitter RF Specifications ........................................................................................139