掌握软件测试基础：80C86微处理器应用与特性详解

需积分: 0 127 浏览量更新于2025-01-08 收藏 418KB PDF 举报

软件测试的相当基本知识在当前的计算机领域，随着软件复杂度的提升和对产品质量的日益重视，软件测试作为一项核心环节的重要性不言而喻。本文将着重介绍软件测试的基础概念，并以Harris 80C86这款高性能16位CMOS微处理器为例，探讨硬件设计与测试的相关知识点。首先，软件测试通常包括单元测试、集成测试、系统测试和验收测试等阶段，确保软件产品的功能正确性、性能、兼容性和稳定性。在Harris 80C86的案例中，作为一款兼容NMOS 8086的16位微处理器，其测试过程需要验证其兼容性、静态设计的低功耗特性以及对多种运算能力的支持，如8位和16位的算术运算（包括二进制和十进制）、乘法和除法功能。 80C86的直流工作电压范围从0°C到+70°C、-40°C到+85°C，甚至-55°C到+125°C的宽温操作范围，体现了对极端环境条件的适应性测试需求。这种测试不仅关注处理器在标准温度下的性能，还必须验证其在极限条件下仍能稳定运行的能力。此外，为了充分利用Harris 80C86的1M字节直接内存寻址能力和24种操作地址模式，测试人员需要编写针对不同指令集和内存访问模式的测试用例，确保数据处理和存储的准确性。对于该芯片的低功耗特性和电流消耗（最大CSB电流为0.5mA，典型操作功耗为每兆赫兹10mA），测试工程师还需要关注功耗相关的性能指标，尤其是在电池供电或嵌入式系统中的应用。最后，由于80C86是完全TTL兼容的，除了时钟信号外，可以利用现有的8086硬件和软件设计进行测试，这意味着在移植和升级过程中，测试流程需要考虑到与原有架构的兼容性，以及可能存在的兼容性问题和潜在的软件漏洞。软件测试不仅仅是检查代码的功能是否符合预期，还包括了对硬件兼容性、性能、可靠性及安全性等多个方面的深入评估。对于像Harris 80C86这样的微处理器，其测试策略需要结合硬件特性、应用需求和行业标准，以确保最终的产品质量满足用户的需求。在实际工作中，理解并掌握这些基础知识是进行有效软件测试的关键。

3-147

RQ/GT0

RQ/GT1

31, 30 I/O REQUEST/GRANT: pins are used by other local bus masters to force the processor to release

the local bus at the end of the processor’s current bus cycle. Each pin is bidirectional with

RQ/GTO having higher priority than RQ/GT1. RQ/GT has an internal pull-up bus hold device so

it may be left unconnected. The request/grant sequence is as follows (see RQ/GT Sequence

Timing)

1. A pulse of 1 CLK wide from another local bus master indicates a local bus request (“hold”)

to the 80C86 (pulse 1).

2. During a T4 or TI clock cycle, a pulse 1 CLK wide from the 80C86 to the requesting master

(pulse 2) indicates that the 80C86 has allowed the local bus to ﬂoat and that it will enter the

“grant sequence” state at the next CLK. The CPU’s bus interface unit is disconnected logi-

cally from the local bus during “grant sequence”.

3. A pulse 1 CLK wide from the requesting master indicates to the 80C86 (pulse 3) that the

“hold” request is about to end and that the 80C86 can reclaim the local bus at the next CLK.

The CPU then enters T4 (or TI if no bus cycles pending).

Each Master-Master exchange of the local bus is a sequence of 3 pulses. There must be one

idle CLK cycle after each bus exchange. Pulses are active low.

If the request is made while the CPU is performing a memory cycle, it will release the local

bus during T4 of the cycle when all the following conditions are met:

1. Request occurs on or before T2.

2. Current cycle is not the low byte of a word (on an odd address).

3. Current cycle is not the ﬁrst acknowledge of an interrupt acknowledge sequence.

4. A locked instruction is not currently executing.

If the local bus is idle when the request is made the two possible events will follow:

1. Local bus will be released during the next cycle.

2. A memory cycle will start within three clocks. Now the four rules for a currently active memory

cycle apply with condition number 1 already satisﬁed.

LOCK 29 O LOCK: output indicates that other system bus masters are not to gain control of the system bus

while LOCK is active LOW. The LOCK signal is activated by the “LOCK” preﬁx instruction and

remains active until the completion of the next instruction. This signal is active LOW, and is held

at a high impedance logic one state during “grant sequence”. In MAX mode, LOCK is automat-

ically generated during T2 of the ﬁrst INTA cycle and removed during T2 of the second INTA

cycle.

QS1, QSO 24, 25 O QUEUE STATUS: The queue status is valid during the CLK cycle after which the queue opera-

tion is performed.

QS1 and QS0 provide status to allow external tracking of the internal 80C86 instruction queue.

Note that QS1, QS0 never become high impedance.

Maximum Mode System (Continued)

The following pin function descriptions are for the 80C86 system in maximum mode (i.e., MN/

MX - GND). Only the pin functions which are

unique to maximum mode are described below.

SYMBOL

NUMBER TYPE DESCRIPTION

QSI QSO

0 0 No Operation

0 1 First byte of op code from queue

1 0 Empty the queue

1 1 Subsequent byte from queue

80C86

剩余34页未读，继续阅读

panda_wan

粉丝: 11
资源: 11

掌握软件测试基础：80C86微处理器应用与特性详解

"软件测试面试常考题型及基本概念

华为软件测试面试攻略：功能测试、性能测试解析

厦门大学软件测试课程详解：角色、实践与内容深度解析

软件测试全套资料，相当金典，欢迎下载共享资源

软件测试课程的相关培训资料，相当不错的哦

软件测试基础知识——适合初学者

软件测试手册----相当好的一本电子教材

软件测试面试题

软件测试学习宝典

计算机软件测试技术

最新资源