VxWorks 6.8 AHCI驱动开发指南

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"VxWorks驱动开发卷二，主要聚焦在VxWorks 6.8版本下的AHCI（Advanced Host Controller Interface）驱动开发，是针对嵌入式系统开发者的重要参考资料。" 在VxWorks操作系统中，设备驱动是连接硬件和操作系统内核的关键组件，它使得操作系统能够有效地管理和控制硬件资源。VxWorks 6.8设备驱动开发卷二，专注于类特定设备驱动的编写，这部分内容对于理解如何为VxWorks开发高级主机控制器接口（AHCI）驱动至关重要。 AHCI是一种串行ATA（SATA）接口规范，它提供了标准的方法来通过PCI Express（PCIe）总线与SATA设备通信。AHCI驱动的开发涉及到以下关键知识点： 1. **AHCI架构**：理解AHCI架构，包括其端口、命令列表、FIS（帧信息结构）和中断处理机制，是开发驱动的基础。 2. **驱动模型**：VxWorks驱动通常遵循模块化设计，包括初始化、数据传输、中断处理和错误管理等部分。开发者需要熟悉VxWorks中的驱动框架，如如何创建设备节点，如何注册中断处理函数等。 3. **PCI配置空间**：由于AHCI是基于PCIe的，因此需要了解如何读写PCI配置空间来识别和配置AHCI控制器。 4. **内存管理**：驱动需要管理内存资源，如分配和释放命令列表和FIS缓冲区。 5. **中断处理**：AHCI驱动需要有效地处理来自硬件的中断，这涉及中断注册、中断服务例程的编写以及中断重试策略。 6. **I/O操作**：理解如何通过编程控制AHCI寄存器来启动和完成数据传输，包括命令的提交和状态的查询。 7. **错误处理和调试**：AHCI驱动需要具备完善的错误处理机制，包括错误检测、报告和恢复。同时，了解如何利用VxWorks的调试工具进行驱动调试也非常重要。 8. **同步和互斥**：由于多任务环境，驱动程序必须确保对共享资源的访问是线程安全的，这可能涉及到锁、信号量等同步机制。 9. **VxWorks API**：熟悉VxWorks提供的系统调用和API，如内存分配函数、中断服务注册、设备注册等，以便于驱动程序的编写。 10. **测试和验证**：驱动开发完成后，需要进行详尽的测试，包括功能测试、性能测试和稳定性测试，以确保驱动在各种条件下都能正常工作。 VxWorks 6.8设备驱动开发卷二，通过AHCI驱动的实例，深入讲解了如何在VxWorks操作系统中开发和管理设备驱动，这对于嵌入式系统开发者提升技能，特别是在高速存储接口的驱动开发上，具有很高的实践价值。

VxWorks

Device Driver Developer's Guide, 6.8

perform other operations that are outside the scope of normal communication that

occurs between a driver and its target hardware.

Graphically, a bus controller can be viewed as an interconnect between a driver

and its target hardware, and another interconnect between VxBus and the bus

being controlled. Figure 2-1 illustrates this communication.

All systems must have at least one bus controller driver. This is because even

devices that are directly connected to a CPU must have a parent bus controller. The

top-level bus controller is referred to as the processor local bus (PLB) bus

controller.

From the PLB, subordinate bus controllers are often available to connect the CPU

to devices that are not local to the CPU itself. An example of this is a PCI bus

controller located on the PLB bus, which serves as a bridge between the PLB

hardware and the PCI bus hardware. The PCI bus controller driver allows the CPU

to access the downstream device.

Within VxBus, bus controller drivers are treated like standard drivers in most

ways. However, there is a fundamental difference between bus controller drivers

and standard drivers; standard drivers typically provide a service to the operating

system or to middleware, while bus controller drivers provide a service to other

drivers.

Bus controller drivers are relatively complex when compared with other drivers

within VxWorks. While the text in this chapter provides information that is

necessary in order to successfully develop a driver, you should also refer to the

Figure 2-1 Bus Controller Communication

DriverDevice

VxBus

Support

bus

controller Driver

CPU

busCtlr

Hardware Software

I/O operations

to target

hardware

I/O operations

to target

hardware

(bus cycles)

(vxbRead32( ),

vxbWrite32( )...)

Bus

(PCI, PLB, ...)

Controller operations

to target hardware

2 Bus Controller Drivers

2.3 VxBus Driver Methods

existing bus controller drivers to see actual implementations and to understand

how bus controller drivers interact with VxWorks. These drivers are located in:

installDir/vxworks-6.x/target/src/hwif/busCtlr

2.3 VxBus Driver Methods

Bus controller drivers use a variety of different driver methods, depending on the

type of bus that is being controlled by the driver. In this release, the majority of

methods are designed for use with either the PLB or PCI bus types. Each driver

method listed in this section lists the bus types that the method is designed to

support. Each section also notes if support for the given driver method is optional.

2.3.1 {busCtlrDevCfgRead}( )

The {busCtlrDevCfgRead}( ) method is used to read 8-, 16-, or 32-byte quantities

from the configuration space of the bus. Currently, this method is used exclusively

on the PCI bus by the PCI bus support code.

Within a bus controller driver, the {busCtlrDevCfgRead}( ) method is

implemented using a driver-provided routine with the following prototype:

LOCAL STATUS func{busCtlrDevCfgRead}

(

VXB_DEVICE_ID pInst, /* device info */

PCI_HARDWARE * pPciDev, /* PCI device info */

UINT32 byteOffset, /* offset into config space */

UINT32 transactionSize, /* transaction size, in bytes */

void * pDstBuf /* buffer to write to */

)

The parameters to func{busCtlrDevCfgRead}( ) are:

pInst

The

VXB_DEVICE_ID for the bus controller instance.

pPciDev

The PCI device info for the target hardware.

byteOffset

The offset into the configuration space where the read is performed. Because

non-aligned configuration accesses are not allowed, byteOffset must be an

even multiple of the transaction size.

transactionSize

The data size to read, in bits. Valid values are 8, 16, and 32.

pDstBuf

A pointer to the buffer used to store the value read from configuration space.

The func{busCtlrDevCfgRead}( ) routine performs whatever device-specific

operations are required to perform the requested read operation from the bus

configuration space.

VxWorks

Device Driver Developer's Guide, 6.8

2.3.2 {busCtlrCfgRead}( )

The {busCtlrCfgRead}( ) method is used to read 8, 16, or 32-byte quantities from

the configuration space of the bus. Currently, this method is used exclusively on

the PCI bus by the PCI bus support code.

Within a bus controller driver, the {busCtlrCfgRead}( ) method is implemented

using a driver-provided routine with the following prototype:

LOCAL STATUS func{busCtlrCfgRead}

(

VXB_DEVICE_ID pInst, /* device info */

int bus, /* bus number */

int dev, /* device number */

int func, /* function number */

UINT32 byteOffset, /* offset into config space */

UINT32 transactionSize,/* transaction size, in bytes */

char * pDstBuf, /* buffer to write to */

UINT32 * pFlags /* flags */

)

The parameters to func{busCtlrCfgRead}( ) are:

pInst

The

VXB_DEVICE_ID for the bus controller instance.

bus

The PCI bus number of the target hardware.

dev

The PCI device number of the target hardware.

func

The PCI function number of the target hardware.

byteOffset

The offset into the configuration space where the read is performed. Because

non-aligned configuration accesses are not allowed, byteOffset must be an

even multiple of the transaction size.

transactionSize

The data size to read, in bits. Valid values are 8, 16, and 32.

pDstBuf

A pointer to the buffer used to store the value read from configuration space.

pFlags

Reserved.

The func{busCtlrCfgRead}( ) routine performs whatever device-specific

operations are required to perform the requested read operation from the bus

configuration space.

NOTE: As of VxWorks 6.7 (VxBus version 4.0.0), the {busCtlrCfgRead}( ) is no

longer supported for bus controller drivers and is replaced by the

{busCtlrDevCfgRead}( ) method (see 2.3.1 {busCtlrDevCfgRead}( ), p.5). If you

have an existing driver that makes use of this method, you must define the

VXB_LEGACY_ACCESS macro and recompile the source in:

installDir/vxworks-6.x/target/src

For more information, see the VxBus version considerations section of the VxWorks

Device Driver Developer’s Guide (Vol. 1): Device Driver Fundamentals.

2 Bus Controller Drivers

2.3 VxBus Driver Methods

2.3.3 {busCtlrDevCfgWrite}( )

The {busCtlrDevCfgWrite}( ) method is used to write 8-, 16-, or 32-byte quantities

to the configuration space of the bus. Currently, this method is used exclusively on

the PCI bus by the PCI bus support code.

Within a bus controller driver, the {busCtlrDevCfgWrite}( ) method is

implemented using a driver-provided routine with the following prototype:

LOCAL STATUS func{busCtlrDevCfgWrite}

(

VXB_DEVICE_ID pInst, /* device info */

PCI_HARDWARE * pPciDev, /* PCI device info */

UINT32 byteOffset, /* offset into config space */

UINT32 transactionSize, /* transaction size, in bytes */

UINT32 data /* data write to the offset */

)

The parameters to func{busCtlrDevCfgWrite}( ) are:

pInst

The

VXB_DEVICE_ID for the bus controller instance.

pPciDev

The PCI device info for the target hardware.

byteOffset

The offset into the configuration space where the write is performed. Because

non-aligned configuration accesses are not allowed, byteOffset must be an

even multiple of the transaction size.

transactionSize

The data size to write, in bits. Valid values are 8, 16, and 32.

data

The data that will be written to configuration space.

The func{busCtlrDevCfgWrite}( ) routine performs whatever device-specific

operations are required to perform the requested write operation to the bus

configuration space.

2.3.4 {busCtlrCfgWrite}( )

The {busCtlrCfgWrite}( ) method is used to write 8, 16, or 32-byte quantities to the

configuration space of the bus. Currently, this method is used exclusively on the

PCI bus by the PCI bus support code.

NOTE: As of VxWorks 6.7 (VxBus version 4.0.0), the {busCtlrCfgWrite}( ) is no

longer supported for bus controller drivers and is replaced by the

{busCtlrDevCfgWrite}( ) method (see 2.3.3 {busCtlrDevCfgWrite}( ), p.7). If you

have an existing driver that makes use of this method, you must define the

VXB_LEGACY_ACCESS macro and recompile the source in:

installDir/vxworks-6.x/target/src

For more information, see the VxBus version considerations section of the VxWorks

Device Driver Developer’s Guide (Vol. 1): Device Driver Fundamentals.

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