PCA9536：远程4位I2C/SMBus I/O扩展器带配置寄存器

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PCA9536是一款远程4位I2C和SMBus（System Management Bus）I/O扩展器，主要设计用于扩展微控制器的接口能力。这款芯片具有配置寄存器，允许用户根据应用需求定制输入/输出端口的状态和功能。PCA9536由德州仪器（Texas Instruments）制造，并且提供了多种封装选项，如DGK、DPACKAGE和YZP。 PCA9536的主要特性包括： 1. **配置寄存器**：PCA9536内置了配置寄存器，用户可以通过I2C总线接口对这些寄存器进行编程，以设置I/O端口的方向（输入或输出）、电平和极性。 2. **无故障上电**：在电源启动时，所有通道均以预设状态配置，确保系统稳定运行，避免上电瞬间出现不必要的信号波动。 3. **低待机电流消耗**：PCA9536在待机模式下仅消耗1μA的最大电流，有助于延长电池寿命或降低系统能耗。 4. **噪声滤波**：SCL（时钟）和SDA（数据）输入端口配备有噪声滤波功能，可以减少外部噪声对通信的影响，提高信号的稳定性。 5. **I2C到并行端口转换器**：PCA9536将I2C串行通信协议转换为4个并行输出，便于驱动多个设备或控制多路数字信号。 6. **带锁存器的高电流驱动输出**：输出端口具有锁存功能，能保持设定的电平状态，即使在I2C总线断开时也能保持输出不变。此外，这些输出具有较高的驱动能力，适合直接驱动LED等负载。 7. **宽电源电压范围**：PCA9536可在2.3V至5.5V的电源电压范围内工作，这使得它适用于各种电源供电的系统。 8. **5V容限I/O端口**：PCA9536的输入/输出端口能够承受5V的电压，提高了与不同电压等级系统的兼容性。 9. **抗Latch-up性能**：该器件的抗Latch-up性能超过100mA，符合JESD78 Class II标准，确保了在高电磁环境下的可靠工作。 10. **高速I2C总线支持**：PCA9536支持最高400kHz的I2C总线速度，满足快速通信需求。 11. **ESD保护**：PCA9536的静电放电（ESD）保护超过JESD22标准，包括2000V人体模型（A114-A）和200V机器模型（A115-A），确保在处理过程中不易受到静电损害。 12. **输入/输出配置和极性反转寄存器**：用户可以通过这两个寄存器来配置每个端口的输入/输出状态以及极性，实现灵活的逻辑控制。 PCA9536的封装选项如DGK、DPACKAGE和YZP，提供了不同的尺寸和引脚布局，以适应不同的电路板空间和设计需求。机械图纸提供了详细的尺寸信息，以确保正确安装和连接。 PCA9536是一款高效、低功耗的I/O扩展解决方案，特别适合需要扩展I2C接口、控制多路数字信号或驱动LED的应用场景。通过其丰富的功能和出色的电气特性，PCA9536为设计者提供了一种可靠的扩展和管理微控制器I/O端口的方法。

Device Address

1 0

Slave Address

R/W

Fixed

10000

Control Register and Command Byte

0 0 0 0 B1 B000

PCA9536

www.ti.com

....................................................................................................................................................... SCPS125F – APRIL 2006 – REVISED AUGUST 2008

Interface Definition

BIT

BYTE

7 (MSB) 6 5 4 3 2 1 0 (LSB)

C slave address H L L L L L H R/ W

Does not affect operation of the PCA9536

Px I/O data bus P3 P2 P1 P0

P7 P6 P5 P4

Figure 4 shows the address byte of the PCA9536.

Figure 4. PCA9536 Address

The slave address equates to 65 (decimal) and 41 (hexadecimal).

The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read

is selected, while a low (0) selects a write operation.

Following the successful acknowledgment of the address byte, the bus master sends a command byte that is

stored in the control register in the PCA9536. Two bits of this data byte state the operation (read or write) and

the internal register (Input, Output, Polarity Inversion, or Configuration) that will be affected. This register can be

written or read through the I

C bus. The command byte is sent only during a write transmission.

Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a

new command byte has been sent.

Figure 5. Control Register Bits

Command Byte

CONTROL REGISTER BITS

COMMAND BYTE POWER-UP

(HEX) DEFAULT

B1 B0

0 0 0x00 Input Port Read byte 1111 XXXX

0 1 0x01 Output Port Read/write byte 1111 1111

1 0 0x02 Polarity Inversion Read/write byte 0000 0000

1 1 0x03 Configuration Read/write byte 1111 1111

Product Folder Link(s): PCA9536

Power-On Reset

PCA9536

SCPS125F – APRIL 2006 – REVISED AUGUST 2008 .......................................................................................................................................................

www.ti.com

The Input Port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is

defined as an input or an output by the Configuration register. It only acts on read operation. Writes to these

registers have no effect. The default value, X, is determined by the externally applied logic level.

Before a read operation, a write transmission is sent with the command byte to instruct the I

C device that the

Input Port register will be accessed next.

I7 I6 I5 I4

BIT I3 I2 I1 I0

Not Used

DEFAULT 1 1 1 1 X X X X

The Output Port register (register 1) shows the outgoing logic levels of the pins defined as outputs by the

Configuration register. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this

O7 O6 O5 O4

BIT O3 O2 O1 O0

Not Used

DEFAULT 1 1 1 1 1 1 1 1

The Polarity Inversion register (register 2) allows polarity inversion of pins defined as inputs by the Configuration

register. If a bit in this register is set (written with 1), the corresponding port pin ' s polarity is inverted. If a bit in this

N7 N6 N5 N4

BIT N3 N2 N1 N0

Not Used

DEFAULT 0 0 0 0 0 0 0 0

The Configuration register (register 3) configures the directions of the I/O pins. If a bit in this register is set to 1,

the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is

cleared to 0, the corresponding port pin is enabled as an output.

C7 C6 C5 C4

BIT C3 C2 C1 C0

Not Used

DEFAULT 1 1 1 1 1 1 1 1

When power (from 0 V) is applied to V

, an internal power-on reset holds the PCA9536 in a reset condition until

has reached V

POR

. At that time, the reset condition is released and the PCA9536 registers and I

C/SMBus

state machine initialize to their default states. After that, V

must be lowered to below 0.2 V and then back up to

the operating voltage for a power-reset cycle.

Product Folder Link(s): PCA9536

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