The PS/2 Mouse/Keyboard Protocol http://www.computer-engineering.org/ps2protocol/
5 of 6 7/3/2007 1:41 PM
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The clock frequency is 10-16.7 kHz. The time from the rising edge of a clock pulse to a Data transition must be at least 5
microseconds. The time from a data transition to the falling edge of a clock pulse must be at least 5 microseconds and no
greater than 25 microseconds.
The host may inhibit communication at any time by pulling the Clock line low for at least 100 microseconds. If a
transmission is inhibited before the 11th clock pulse, the device must abort the current transmission and prepare to
retransmit the current "chunk" of data when host releases Clock. A "chunk" of data could be a make code, break code,
device ID, mouse movement packet, etc. For example, if a keyboard is interrupted while sending the second byte of a
two-byte break code, it will need to retransmit both bytes of that break code, not just the one that was interrupted.
If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the
keyboard/mouse does not need to retransmit any data. However, if new data is created that needs to be transmitted, it will
have to be buffered until the host releases Clock. Keyboards have a 16-byte buffer for this purpose. If more than 16 bytes
worth of keystrokes occur, further keystrokes will be ignored until there's room in the buffer. Mice only store the most
current movement packet for transmission.
Host-to-Device Communication:
The packet is sent a little differently in host-to-device communication...
First of all, the PS/2 device always generates the clock signal. If the host wants to send data, it must first put the Clock
and Data lines in a "Request-to-send" state as follows:
Inhibit communication by pulling Clock low for at least 100 microseconds.
Apply "Request-to-send" by pulling Data low, then release Clock.
The device should check for this state at intervals not to exceed 10 milliseconds. When the device detects this state, it
will begin generating Clock signals and clock in eight data bits and one stop bit. The host changes the Data line only
when the Clock line is low, and data is read by the device when Clock is high. This is opposite of what occours in
device-to-host communication.
After the stop bit is received, the device will acknowledge the received byte by bringing the Data line low and generating
one last clock pulse. If the host does not release the Data line after the 11th clock pulse, the device will continue to
generate clock pulses until the the Data line is released (the device will then generate an error.)
The host may abort transmission at time before the 11th clock pulse (acknowledge bit) by holding Clock low for at least
100 microseconds.
To make this process a little easier to understand, here's the steps the host must follow to send data to a PS/2 device:
1) Bring the Clock line low for at least 100 microseconds.
2) Bring the Data line low.
3) Release the Clock line.
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