"TI-TLIN1021-Q1 Lin收发器与电压调节器MCULIN控制器"
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The document "TI-TLIN1021-Q1.pdf" provides detailed information about the LIN transceiver and voltage regulator, as well as the LIN controller and SCI/UART interface. The LIN transceiver, labeled as "Lin收发器," is designed to support the LIN bus protocol and can operate with a supply voltage (VDD) ranging from 3.3V to 18V. It also features a low current standby mode and is suitable for automotive applications. The voltage regulator, labeled as "Voltage Regulator," is an integrated circuit that maintains a stable output voltage for the LIN controller and other components. The LIN controller, or "MCU," is responsible for controlling the LIN transceiver and communicating with the LIN bus master node. It interfaces with the LIN transceiver through the SCI/UART, allowing for bidirectional communication and control. The LIN controller operates with a supply voltage (VDD) that is regulated by the voltage regulator. Overall, the components described in the document are essential for establishing reliable communication and control within a LIN bus network, particularly in automotive systems. The document also includes technical specifications, ordering information, and tools for further development and integration.
8
TLIN1021-Q1
ZHCSJY5A –JUNE 2019–REVISED DECEMBER 2019
www.ti.com.cn
Copyright © 2019, Texas Instruments Incorporated
Electrical Characteristics (continued)
parameters valid across -40℃ ≤ T
J
≤ 150℃ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(3) Duty cycle LIN driver bus load conditions (C
LINBUS
, R
LINBUS
): Load1 = 1 nF; 1 kΩ / Load2 = 6.8 nF; 660 Ω / Load3 = 10 nF; 500 Ω.
(4) Duty cycles 3 and 4 are defined for 10.4-kbps operation. The TLIN1029 meets these lower data rate requirements while it is also
capable of the higher speed 20-kbps operation as specified by duty cycles 1 and 2. SAE J2602 derives propagation delay equations
from the LIN 2.0 duty cycle definitions, for details see the SAE J2602 specification.
ΔV
H
High level voltage drop INH with respect to V
SUP
I
INH
= - 0.5 mA 0.5 1 V
I
LKG(INH)
Leakage current sleep mode INH = 0 V –0.5 0.5 µA
WAKE Input Terminal
V
IH
High-level input voltage Standby and sleep mode
V
SUP
–
1.8
V
V
IL
Low-level input voltage Standby and sleep mode
V
SUP
–
3.85
V
I
IH
High-level input leakage current WAKE = V
SUP
- 1 V –25 –12.5 µA
I
IL
Ligh-level input leakage current WAKE = 1 V 15 25 µA
t
WAKE
WAKE hold time Wake up time from sleep mode 5 50 µs
Duty Cycle Characteristics
D1
12V
Duty Cycle 1
ISO 17987 Param 27
(3)
TH
REC(MAX)
= 0.744 x V
SUP
,
TH
DOM(MAX)
= 0.581 x V
SUP
,
V
SUP
= 7 V to 18 V, t
BIT
= 50 µs (20 kbps),
D1 = t
BUS_rec(min)
/(2 x t
BIT
)
See 图 18 and 图 19
0.396
D1
12V
Duty Cycle 1
TH
REC(MAX)
= 0.625 x V
SUP
,
TH
DOM(MAX)
= 0.581 x V
SUP
,
V
SUP
= 4.5 V to 7 V, t
BIT
= 50 µs (20 kbps),
D1 = t
BUS_rec(min)
/(2 x t
BIT
)
See 图 18 and 图 19
0.396
D2
12V
Duty Cycle 2
ISO 17987 Param 28
TH
REC(MIN)
= 0.422 x V
SUP
,
TH
DOM(MIN)
= 0.284 x V
SUP
,
V
SUP
= 4.5 V to 18 V, t
BIT
= 50 µs (20 kbps),
D2 = t
BUS_rec(MAX)
/(2 x t
BIT
)
See 图 18 and 图 19
0.581
D3
12V
Duty Cycle 3
ISO 17987 Param 29
(4)
TH
REC(MAX)
= 0.778 x V
SUP
,
TH
DOM(MAX)
= 0.616 x V
SUP
,
V
SUP
= 7 V to 18 V, t
BIT
= 96 µs (10.4 kbps),
D3 = t
BUS_rec(min)
/(2 x t
BIT
)
See 图 18 and 图 19
0.417
D3
12V
Duty Cycle 3
TH
REC(MAX)
= 0.645 x V
SUP
, TH
DOM(MAX)
=
0.616 x V
SUP
, V
SUP
= 4.5 V to 7 V, t
BIT
= 96
µs (10.4 kbps),
D3 = t
BUS_rec(min)
/(2 x t
BIT
)
See 图 18 and 图 19
0.417
D4
12V
Duty Cycle 4
ISO 17987 Param 30
TH
REC(MIN)
= 0.389 x V
SUP
,
TH
DOM(MIN)
= 0.251 x V
SUP
,
V
SUP
= 7 V to 18 V, t
BIT
= 96 µs (10.4 kbps),
D4 = t
BUS_rec(MAX)
/(2 x t
BIT
)
See 图 18 and 图 19
0.59
D4
12V
Duty Cycle 4
TH
REC(MIN)
= 0.422 x V
SUP
,
TH
DOM(MIN)
= 0.284 x V
SUP
,
V
SUP
= 4.5 V to 7 V, t
BIT
= 96 µs (10.4 kbps),
D4 = t
BUS_rec(MAX)
/(2 x t
BIT
)
See 图 18 and 图 19
0.59
7.7 AC Switching Characteristics
parameters valid across -40℃ ≤ T
J
≤ 150℃ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Device Switching Characteristics
t
rx_pdr
Receiver rising propagation delay time
ISO 17987 Param 31
R
RXD
= 2.4 kΩ, C
RXD
= 20 pF
See 图 20 and 图 21
6 µs
t
rx_pdf
Receiver falling propagation delay time
ISO 17987 Param 31
6 µs
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