STM32L432超低功耗微控制器数据手册与性能分析

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"STM32L432是意法半导体（STMicroelectronics）推出的一款超低功耗微控制器，属于STM32L4系列。该器件基于Arm Cortex-M4 32位处理器核心，配备浮点运算单元（FPU），在提供高性能计算能力的同时，优化了能源效率。STM32L432主要应用于需要极低功耗和高效能的嵌入式设计，如物联网设备、穿戴设备、传感器节点等。 STM32L432的特点包括： 1. **超低功耗**：支持1.71V至3.6V的工作电压范围，适用于广泛的电源环境。它能在不同工作模式下实现极低的功耗，如在待机模式下仅消耗28nA（两个唤醒引脚），RTC运行时为280nA，在停机2模式下功耗仅为1.0μA，RTC运行时为1.28μA。此外，还有8nA的关断模式和4μs的快速唤醒时间。 2. **温度范围广泛**：可在-40°C至85°C，甚至105°C或125°C的极端温度范围内正常工作，增强了其在各种环境条件下的应用潜力。 3. **处理性能**：Cortex-M4 CPU集成FPU和Adaptive Real-Time Accelerator (ART Accelerator)，允许0等待状态执行，最高可达80MHz的时钟频率，提供100DMIPS和DSP指令的处理能力。在Drystone2.1基准测试中，其性能达到1.25 DMIPS/MHz，CoreMark测试分数为273.55（3.42 CoreMark/MHz @ 80MHz）。 4. **能源效率**：在ULPBench测试中，STM32L432获得了176.7的高分，表明其在能源效率方面表现出色。 5. **时钟源**：内置多种时钟源，包括用于RTC的32kHz晶体振荡器（LSE）、16MHz工厂校准的RC振荡器（±1%误差）、低功耗32kHz RC振荡器（±5%误差）以及内部时钟系统。 6. **其他特性**：还包括批量采集模式（BAM）、棕色输出重置（BOR）以及片上互连矩阵等，以提高系统灵活性和稳定性。 7. **内存配置**：STM32L432KB和STM32L432KC型号提供了从64KB到256KB的闪存和64KB的SRAM，满足不同存储需求。 8. **外设与接口**：集成了USB全速接口、模拟功能和音频支持，适用于多种应用场景。 STM32L432的数据手册详细介绍了这些特性和更多技术参数，是开发基于此微控制器产品的关键参考资料。对于需要在电池供电、低功耗环境下运行的设备设计者来说，STM32L432是一个极具吸引力的选择。"

Functional overview STM32L432KB STM32L432KC

16/156 DS11451 Rev 4

The whole non-volatile memory embeds the error correction code (ECC) feature supporting:

• single error detection and correction

• double error detection.

• The address of the ECC fail can be read in the ECC register

3.5 Embedded SRAM

STM32L432xx devices feature 64 Kbyte of embedded SRAM. This SRAM is split into two

blocks:

• 48 Kbyte mapped at address 0x2000 0000 (SRAM1)

• 16 Kbyte located at address 0x1000 0000 with hardware parity check (SRAM2).

This memory is also mapped at address 0x2000 C000, offering a contiguous address

space with the SRAM1 (16 Kbyte aliased by bit band)

This block is accessed through the ICode/DCode buses for maximum performance.

These 16 Kbyte SRAM can also be retained in Standby mode.

The SRAM2 can be write-protected with 1 Kbyte granularity.

The memory can be accessed in read/write at CPU clock speed with 0 wait states.

3.6 Firewall

The device embeds a Firewall which protects code sensitive and secure data from any

access performed by a code executed outside of the protected areas.

Each illegal access generates a reset which kills immediately the detected intrusion.

The Firewall main features are the following:

• Three segments can be protected and defined thanks to the Firewall registers:

– Code segment (located in Flash or SRAM1 if defined as executable protected

area)

– Non-volatile data segment (located in Flash)

– Volatile data segment (located in SRAM1)

• The start address and the length of each segments are configurable:

– Code segment: up to 1024 Kbyte with granularity of 256 bytes

– Non-volatile data segment: up to 1024 Kbyte with granularity of 256 bytes

– Volatile data segment: up to 48 Kbyte with a granularity of 64 bytes

• Specific mechanism implemented to open the Firewall to get access to the protected

areas (call gate entry sequence)

• Volatile data segment can be shared or not with the non-protected code

• Volatile data segment can be executed or not depending on the Firewall configuration

The Flash readout protection must be set to level 2 in order to reach the expected level of

protection.

DS11451 Rev 4 17/156

STM32L432KB STM32L432KC Functional overview

3.7 Boot modes

At startup, BOOT0 pin or nSWBOOT0 option bit, and BOOT1 option bit are used to select

one of three boot options:

• Boot from user Flash

• Boot from system memory

• Boot from embedded SRAM

BOOT0 value may come from the PH3-BOOT0 pin or from an option bit depending on the

value of a user option bit to free the GPIO pad if needed.

A Flash empty check mechanism is implemented to force the boot from system flash if the

first flash memory location is not programmed and if the boot selection is configured to boot

from main flash.

The boot loader is located in system memory. It is used to reprogram the Flash memory by

using USART, I2C, SPI or USB FS in Device mode through DFU (device firmware upgrade).

3.8 Cyclic redundancy check calculation unit (CRC)

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

3.9 Power supply management

3.9.1 Power supply schemes

• V

= 1.71 to 3.6 V: external power supply for I/Os (V

DDIO1

), the internal regulator and

the system analog such as reset, power management and internal clocks. It is provided

externally through VDD pins.

• V

DDA

= 1.62 V (ADCs/COMPs) / 1.8 (DAC/OPAMP) to 3.6 V: external analog power

supply for ADCs, DAC, OPAMPs, Comparators and Voltage reference buffer. The V

DDA

voltage level is independent from the V

voltage.

Note: When the functions supplied by V

DDA

or V

DDUSB

are not used, these supplies should

preferably be shorted to V

Note: If these supplies are tied to ground, the I/Os supplied by these power supplies are not 5 V

tolerant (refer to

Table 18: Voltage characteristics).

Note: V

DDIOx

is the I/Os general purpose digital functions supply. V

DDIOx

represents V

DDIO1

, with

DDIO1

= V

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