STM32L073系列超低功耗MCU datasheet详解

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STM32L073RZ是一款针对低功耗应用设计的高性能32位微控制器（MCU），基于ARM Cortex-M0+架构，由STM公司生产。这款设备适合于对功耗、温度范围和嵌入式系统功能有严格要求的应用场景，如工业自动化、物联网(IoT)设备和电池供电的消费电子产品。该文档详细介绍了产品的关键特性： 1. **超低功耗**：STM32L073RZ支持1.65V至3.6V宽电压范围，能够在-40℃至125℃的极端温度下稳定工作。它提供多种低功耗模式，如标准模式下的0.29 µA（唤醒3个引脚）、停机模式下仅0.43 µA（16个唤醒线）以及带有RTC和20 KB RAM的停机模式下仅0.86 µA。运行模式下的电流低至93 µA/MHz，且从Flash唤醒时间仅为5 µs。 2. **处理器性能**：内置一个ARM Cortex-M0+内核，最高主频可达32 MHz，提供0.95 DMIPS/MHz的性能，支持多种时钟源选择，包括1到25 MHz的晶体振荡器，以及用于RTC的32 kHz振荡器，还有内部高精度的16 MHz工厂预调整的RC振荡器。 3. **电源管理**：拥有出色的电源管理功能，包括可编程的棕色-out（BOD）、低功耗上电/掉电复位（POR/PDR）和可编程电压检测器（PVD），确保在电源波动或故障时仍能维持系统安全。 4. **外设集成**：设备集成了多种高级功能，如12位ADC（最大10 kSps转换速率），以及数字模拟转换器(DACs)，支持LCD接口，以及USB连接，为用户提供了丰富的扩展选项。 5. **存储器**：内存配置包括192 KB Flash存储器，20 KB的SRAM，以及6 KB的EEPROM，确保数据存储和程序执行的灵活性。 STM32L073RZ是一款针对能源效率和可靠性要求高的应用场景的理想选择，其强大的处理能力、低功耗特性和广泛的外设集成使其成为现代嵌入式系统开发中的首选器件。

Functional overview STM32L073xx

16/139 DocID027096 Rev 3

Table 3. Functionalities depending on the operating power supply range

Operating power

supply range

Functionalities depending on the operating power supply range

DAC and ADC

operation

Dynamic

voltage scaling

range

I/O operation USB

= 1.65 to 1.71 V

ADC only,

conversion time

up to 570 ksps

Range 2 or

range 3

Degraded speed

performance

Not functional

= 1.71 to 1.8 V

(1)

1. CPU frequency changes from initial to final must respect "fcpu initial <4*fcpu final". It must also respect 5

μs delay between two changes. For example to switch from 4.2 MHz to 32 MHz, you can switch from 4.2

MHz to 16 MHz, wait 5 μs, then switch from 16 MHz to 32 MHz.

ADC only,

conversion time

up to 1.14 Msps

Range 1, range 2

or range 3

Degraded speed

performance

Functional

(2)

= 1.8 to 2.0 V

(1)

Conversion time

up to 1.14 Msps

Range1, range 2

or range 3

Degraded speed

performance

Functional

(2)

= 2.0 to 2.4 V

Conversion time

up to

1.14 Msps

Range 1, range 2

or range 3

Full speed operation Functional

(2)

2. To be USB compliant from the I/O voltage standpoint, the minimum V

DD_USB

is 3.0 V.

= 2.4 to 3.6 V

Conversion time

up to

1.14 Msps

Range 1, range 2

or range 3

Full speed operation Functional

(2)

Table 4. CPU frequency range depending on dynamic voltage scaling

CPU frequency range Dynamic voltage scaling range

16 MHz to 32 MHz (1ws)

32 kHz to 16 MHz (0ws)

Range 1

8 MHz to 16 MHz (1ws)

32 kHz to 8 MHz (0ws)

Range 2

32 kHz to 4.2 MHz (0ws) Range 3

Functional overview STM32L073xx

20/139 DocID027096 Rev 3

3.3 ARM

Cortex

-M0+ core with MPU

The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a

broad range of embedded applications. It offers significant benefits to developers, including:

 a simple architecture that is easy to learn and program

 ultra-low power, energy-efficient operation

 excellent code density

 deterministic, high-performance interrupt handling

 upward compatibility with Cortex-M processor family

 platform security robustness, with integrated Memory Protection Unit (MPU).

The Cortex-M0+ processor is built on a highly area and power optimized 32-bit processor

core, with a 2-stage pipeline Von Neumann architecture. The processor delivers exceptional

energy efficiency through a small but powerful instruction set and extensively optimized

design, providing high-end processing hardware including a single-cycle multiplier.

The Cortex-M0+ processor provides the exceptional performance expected of a modern 32-

bit architecture, with a higher code density than other 8-bit and 16-bit microcontrollers.

Owing to its embedded ARM core, the STM32L073xx are compatible with all ARM tools and

software.

Nested vectored interrupt controller (NVIC)

The ultra-low-power STM32L073xx embed a nested vectored interrupt controller able to

handle up to 32 maskable interrupt channels and 4 priority levels.

The Cortex-M0+ processor closely integrates a configurable Nested Vectored Interrupt

Controller (NVIC), to deliver industry-leading interrupt performance. The NVIC:

 includes a Non-Maskable Interrupt (NMI)

 provides zero jitter interrupt option

 provides four interrupt priority levels

The tight integration of the processor core and NVIC provides fast execution of Interrupt

Service Routines (ISRs), dramatically reducing the interrupt latency. This is achieved

through the hardware stacking of registers, and the ability to abandon and restart load-

multiple and store-multiple operations. Interrupt handlers do not require any assembler

wrapper code, removing any code overhead from the ISRs. Tail-chaining optimization also

significantly reduces the overhead when switching from one ISR to another.

To optimize low-power designs, the NVIC integrates with the sleep modes, that include a

deep sleep function that enables the entire device to enter rapidly stop or standby mode.

This hardware block provides flexible interrupt management features with minimal interrupt

latency.

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