10
Philips Semiconductors
The I
2
C-bus specification
7 TRANSFERRING DATA
7.1 Byte format
Every byte put on the SDA line must be 8-bits long. The
number of bytes that can be transmitted per transfer is
unrestricted. Each byte has to be followed by an
acknowledge bit. Data is transferred with the most
significant bit (MSB) first (see Fig.6). If a slave can’t
receive or transmit another complete byte of data until it
has performed some other function, for example servicing
an internal interrupt, it can hold the clock line SCL LOW to
force the master into a wait state. Data transfer then
continues when the slave is ready for another byte of data
and releases clock line SCL.
In some cases, it’s permitted to use a different format from
the I
2
C-bus format (for CBUS compatible devices for
example). A message which starts with such an address
can be terminated by generation of a STOP condition,
even during the transmission of a byte. In this case, no
acknowledge is generated (see Section 10.1.3).
7.2 Acknowledge
Data transfer with acknowledge is obligatory. The
acknowledge-related clock pulse is generated by the
master. The transmitter releases the SDA line (HIGH)
during the acknowledge clock pulse.
The receiver must pull down the SDA line during the
acknowledge clock pulse so that it remains stable LOW
during the HIGH period of this clock pulse (see Fig.7). Of
course, set-up and hold times (specified in Section 15)
must also be taken into account.
Usually, a receiver which has been addressed is obliged to
generate an acknowledge after each byte has been
received, except when the message starts with a CBUS
address (see Section 10.1.3).
When a slave doesn’t acknowledge the slave address (for
example, it’s unable to receive or transmit because it’s
performing some real-time function), the data line must be
left HIGH by the slave. The master can then generate
either a STOP condition to abort the transfer, or a repeated
START condition to start a new transfer.
If a slave-receiver does acknowledge the slave address
but, some time later in the transfer cannot receive any
more data bytes, the master must again abort the transfer.
This is indicated by the slave generating the
not-acknowledge on the first byte to follow. The slave
leaves the data line HIGH and the master generates a
STOP or a repeated START condition.
If a master-receiver is involved in a transfer, it must signal
the end of data to the slave- transmitter by not generating
an acknowledge on the last byte that was clocked out of
the slave. The slave-transmitter must release the data line
to allow the master to generate a STOP or repeated
START condition.
Fig.6 Data transfer on the I
2
C-bus.
handbook, full pagewidth
MSC608
Sr
or
P
SDA
Sr
P
SCL
STOP or
repeated START
condition
S
or
Sr
START or
repeated START
condition
1 2 3 - 8 9
ACK
9
ACK
7812
MSB
acknowledgement
signal from slave
byte complete,
interrupt within slave
clock line held low while
interrupts are serviced
acknowledgement
signal from receiver