"TI LVDS发送器SN65ELT20规格及应用指南"
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更新于2023-12-26
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The TI-SN65ELT20 is a LVDS (Low Voltage Differential Signaling) transmitter that is designed to translate 5-V TTL (Transistor-Transistor Logic) signals to differential PECL (Positive Emitter-Coupled Logic) signals. This device is housed in an 8-pin DGK-8 package and has a maximum propagation delay of 1.25 ns. It operates within a voltage range of 4.2 to 5.7 V with GND set at 0 V. The flow-through pinout configuration of the SN65ELT20 makes it easy to integrate into circuit layouts, and it also includes built-in temperature compensation.
The 5-V TTL-to-Differential PECL Translator offers a drop-in compatibility with the MC10ELT20 and MC100ELT20, allowing for easy replacement of these devices in existing designs. Its primary applications include data and clock transmission over backplanes, as well as signaling level conversion in various communication systems.
The SN65ELT20 is well-suited for use in systems where high-speed data transmission is required, such as in telecommunications, networking, and industrial automation. With its fast propagation delay and wide operating voltage range, it provides a reliable and efficient solution for converting TTL signals to PECL for improved noise immunity and signal integrity.
Overall, the TI-SN65ELT20 is a versatile and high-performance LVDS transmitter that offers a simple and effective means of interfacing 5-V TTL logic with differential PECL systems. Its compatibility with other devices and its ability to operate in a wide voltage range make it a valuable component for various applications requiring data and clock transmission over backplanes and signaling level conversion. For engineers and designers working on high-speed communication systems, the SN65ELT20 provides a reliable and easy-to-use solution that enables seamless integration and reliable performance.
SN65ELT20
www.ti.com
SLLS922A –DECEMBER 2008–REVISED MARCH 2012
PECL DC CHARACTERISTICS
(1)
(V
CC
= 5 V; GND = 0 V)
(2)
–40°C 25°C 85°C
PARAMETER UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX
I
CC
Power-supply current 9.6 16 10.1 16 10.7 16 mA
V
OH
Output HIGH voltage
(3)
3915 3958 4120 3915 3963 4120 3915 3967 4120 mV
V
OL
Output LOW voltage
(3)
3170 3247 3380 3170 3244 3380 3170 3244 3380 mV
(1) The device meets these specifications after thermal equilibrium has been established when mounted in a test socket or printed-circuit
board with maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and are not valid simultaneously.
(2) Output parameters vary 1:1 with Vcc.
(3) Outputs are terminated through a 50-Ω resistor to V
CC
– 2 V.
TTL INPUT DC CHARACTERISTICS
(1)
(V
CC
= 4.2 V to 5.7 V; T
A
= –40°C to 85°C)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
IH
V
IN
= 2.7 V 20
Input HIGH current μA
I
IH
V
IN
= V
CC
20
I
IL
Input LOW current V
IN
= 0.5 V –0.6 mA
V
IK
Input clamp diode voltage I
IN
= –18 mA –1.2 V
V
IH
Input HIGH voltage 2 V
V
IL
Input LOW voltage 0.8 V
(1) The device meets these specifications after thermal equilibrium has been established when mounted in a test socket or printed-circuit
board with maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and are not valid simultaneously.
AC CHARACTERISTICS
(1)
(V
CC
= 4.2 V to 5.7 V; GND = 0 V)
–40°C 25°C 85°C
PARAMETER UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX
f
MAX
Maximum switching frequency
(2)
(See 400 430 430 MHz
Figure 4.)
t
PLH
Propagation delay, 1.5 V to 50% (see Figure 2) 0.9 1.25 0.9 1.25 0.9 1.25 ns
t
PHL
Propagation delay, 1.5 V to 50% (see Figure 2) 0.7 1.2 0.7 1.2 0.7 1.2 ns
t
JITTER
Random clock jitter (RMS) 0.5 0.5 0.5 ps
Q-output rise/fall times (20%–80%) (see 1.5 1 1.5 1
t
r
/t
f
1 1.5 ns
Figure 3)
(1) The device meets these specifications after thermal equilibrium has been established when mounted in a test socket or printed-circuit
board with maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and are not valid simultaneously.
(2) Maximum switching frequency is measured at an output amplitude of 300 mV
PP
.
Copyright © 2008–2012, Texas Instruments Incorporated 3
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