16 × 16 silicon Mach–Zehnder interferometer switch
actuated with waveguide microheaters
Shuoyi Zhao, Liangjun Lu, Linjie Zhou,* Dong Li, Zhanzhi Guo, and Jianping Chen
State Key Laboratory of Advanced Optical Communication Systems and Networks, Department of Electronic
Engineering, Shanghai Jiao Tong University, Shanghai 200240, China
*Corresponding author: ljzhou@sjtu.edu.cn
Received July 1, 2016; revised August 29, 2016; accepted August 31, 2016;
posted September 1, 2016 (Doc. ID 269538); published September 23, 2016
We experimentally demonstrate a 16 × 16 reconfigurably nonblocking optical switch fabric using a Benes archi-
tecture. The switch fabric consists of 56 2 × 2 Mach–Zehnder interferometer based elementary switches, with
each integrated with a pair of waveguide microheaters. The average on-chip insertion loss is ∼5.2 dB for both
of the “all-cross” and the “ all-bar” states, with a loss variation of 1 dB over all routing paths. The cross talk
for all switching states is better than −30 dB. The switching time of the switch element is about 22 μs. The switch-
ing functionality is verified by transmission of a 40 Gb∕s quadrature phase-shift keying optical signal. © 2016
Chinese Laser Press
OCIS codes: (130.0130) Integrated optics; (130.3120) Integrated optics devices; (130.4815) Optical
switching devices.
http://dx.doi.org/10.1364/PRJ.4.000202
1. INTRODUCTION
According to the forecast of Cisco, the annual Internet
Protocol (IP) traffic will surpass the 2 zettabyte threshold
in 2019, and the IP traffic will grow at a compound annual
growth rate of 23% from 2014 to 2019 [1]. The continuous de-
mand for higher data transmission bandwidth requires energy-
efficient switching to support the ever-growing intelligent and
programmable optical networks. A hybrid network architec-
ture will be envisioned in the future to take advantage of both
electrical and optical switching [2]. The electrical switching
can be used for small bursty data flows and data processing
intensive applications while the optical switching is suitable
for larger data flow traffic. Optical switches have the advan-
tages of high switching capacity, low power consumption, and
compact size compared with their electrical counterparts.
Over the past years, a variety of optical switch technologies
have been developed based on micro-electromechanical
system (MEMS) actuators [3,4], silica-based planar lightwave
circuits (PLCs) [5,6], and III–V materials [7,8]. Silicon photon-
ics has been regarded as one of the most promising
technologies for the merits of monolithic integration with
microelectronic drive circuits and potentially low-cost,
large-volume production.
Many N × N thermo-optic (TO) [9–14] and electro-optic
(EO) [15–21] switches have been reported in recent years.
EO switches possess fast switching time (a few nanoseconds)
but have high cross talk and insertion loss due to the electro-
absorption effect associated with the electrorefraction effect
after free-carrier injection. On the contrary, the TO switches
remain low loss, but the switching time is intrinsically limited
to microseconds. In the hybrid network systems, the optical
switches are used to process the slow but large-flow optical
traffic, and therefore the TO switches are preferred for their
low loss and low cross talk. A 32 × 32 TO switch has been
demonstrated [10]. It has a narrow transmission bandwidth
of 1.8 nm for cross talk below −20 dB, and the on-chip inser-
tion loss is 15.8 dB.
In our previous work, we have experimentally demon-
strated two types of 4 × 4 TO switches based on cascaded
multimode interferometers (MMIs) [12,13]. The cross talk
is relatively high due to the imperfect power splitting of
MMIs. In this paper, we present a 16 × 16 reconfigurably non-
blocking silicon TO switch based on 2 × 2 Mach–Zehnder
interferometers (MZIs) actuated with waveguide microheat-
ers. The chip has a footprint of 7 mm × 3.
6 mm. The average
on-chip insertion loss of the 16 × 16 switch is about 5.2 dB, and
the cross talk is below −30 dB in a bandwidth of 10 nm for
all states. Optical transmission of a 40-Gb/s quadrature
phase-shift keying (QPSK) signal verifies the fidelity of the
signal after passing through the switch chip.
2. DEVICE DESIGN AND FABRICATION
The 16 × 16 switch is constructed based on a Benes structure,
as shown in Fig. 1. The Benes architecture is reconfigurably
nonblocking and requires the minimum number of switching
elements to obtain the complete switch states. It possesses the
lowest insertion loss compared to crossbar, switch-and-select,
path-independent insertion-loss (PILOSS), N-stage planar, and
other architectures. A 16 × 16 Benes architecture comprises
56 2 × 2 switch elements. Each routing path goes through
seven stages of switch elements. As each element has two
states, the 16 × 16 switch hence has 2
56
states in total, among
which 16! states are necessary for the complete mapping. The
inset shows the structure of the switch element. It is com-
posed of two 2 × 2 MMIs with waveguide microheaters inte-
grated in both arms for TO tuning of the silicon refractive
index. The design of the microheater can be found in [17].
The microheater is designed to be 400 μm long in order to
202 Photon. Res. / Vol. 4, No. 5 / October 2016 Zhao et al.
2327-9125/16/050202-06 © 2016 Chinese Laser Press