CUDA编程指南：新手友好，全面升级到4.0

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本指南是NVIDIA官方发布的CUDA编程教程，针对CUDA编程初学者设计，特别适用于CUDA版本4.0。该指南在更新中对先前版本进行了多项改进，以适应新功能和性能提升。以下是关键更改点： 1. **弃用与过时函数**：所有关于`cudaThread*`的提及已被替换为新的`cudaDevice*`名称，确保了代码的兼容性和最佳实践。 2. **纹理类型更新**：文本引用中的`<…>`纹理类型已使用新的`cudaTextureType*`宏进行标准化，提高了代码的一致性和可读性。 3. **三维网格支持**：章节2.2、B.16和F.1部分得到了更新，以反映对于计算能力2.0及更高版本设备上三维网格的支持。 4. **内容修订**：第3章的序言进行了重写，可能包含对新特性的介绍或指导。 5. **新功能介绍**：增加了关于即时编译（Just-In-Time Compilation）的3.1.1.2节，这是CUDA 4.0中的一个重要特性。 6. **内存管理澄清**：从第3.2节的序言中移除了关于主机线程资源分配的旧表述，因为这一规则已经不再适用，更新了关于内存管理和多设备编程的描述。 7. **虚拟地址空间统一**：由于多设备编程的变更和统一虚拟地址空间的引入，3.2.4.1和3.2.4.3部分进行了重写，以适应这种变化。 8. **内存锁定**：在3.2.4和3.3.6部分提到了如何使用`malloc()`为GPU内存分配并进行页面锁定，这有助于优化内存访问效率。 9. **新设备属性**：在3.2.5.4中提到了`asyncEngineCount`设备属性，这可能与异步计算引擎的数量有关。 10. **命令解释**：3.2.5.5节的序言中可能强调了某些命令的新用法或上下文。通过这些改动，CUDA 4.0编程指南不仅保持了技术的最新性，还更加注重用户体验，帮助初学者更快地理解和掌握CUDA编程技巧。对于那些正在学习或需要升级CUDA技能的人来说，这是一个重要的参考资料。

Chapter 1. Introduction

4 CUDA C Programming Guide Version 4.0

solve many complex computational problems in a more efficient way than on a

CPU.

CUDA comes with a software environment that allows developers to use C as a

high-level programming language. As illustrated by Figure 1-3, other languages or

application programming interfaces are supported, such as CUDA FORTRAN,

OpenCL, and DirectCompute.

Figure 1-3. CUDA is Designed to Support Various Languages

and Application Programming Interfaces

1.3 A Scalable Programming Model

The advent of multicore CPUs and manycore GPUs means that mainstream

processor chips are now parallel systems. Furthermore, their parallelism continues

to scale with Moore‟s law. The challenge is to develop application software that

transparently scales its parallelism to leverage the increasing number of processor

cores, much as 3D graphics applications transparently scale their parallelism to

manycore GPUs with widely varying numbers of cores.

The CUDA parallel programming model is designed to overcome this challenge

while maintaining a low learning curve for programmers familiar with standard

programming languages such as C.

At its core are three key abstractions – a hierarchy of thread groups, shared

memories, and barrier synchronization – that are simply exposed to the programmer

as a minimal set of language extensions.

These abstractions provide fine-grained data parallelism and thread parallelism,

nested within coarse-grained data parallelism and task parallelism. They guide the

programmer to partition the problem into coarse sub-problems that can be solved

independently in parallel by blocks of threads, and each sub-problem into finer

pieces that can be solved cooperatively in parallel by all threads within the block.

Chapter 2. Programming Model

8 CUDA C Programming Guide Version 4.0

2.2 Thread Hierarchy

For convenience, threadIdx is a 3-component vector, so that threads can be

identified using a one-dimensional, two-dimensional, or three-dimensional thread

index, forming a one-dimensional, two-dimensional, or three-dimensional thread

block. This provides a natural way to invoke computation across the elements in a

domain such as a vector, matrix, or volume.

The index of a thread and its thread ID relate to each other in a straightforward

way: For a one-dimensional block, they are the same; for a two-dimensional block

of size (D

, D

), the thread ID of a thread of index (x, y) is (x + y D

); for a three-

dimensional block of size (D

, D

), the thread ID of a thread of index (x, y, z) is

(x + y D

+ z D

As an example, the following code adds two matrices A and B of size NxN and

stores the result into matrix C:

// Kernel definition

__global__ void MatAdd(float A[N][N], float B[N][N],

float C[N][N])

{

int i = threadIdx.x;

int j = threadIdx.y;

C[i][j] = A[i][j] + B[i][j];

}

int main()

{

...

// Kernel invocation with one block of N * N * 1 threads

int numBlocks = 1;

dim3 threadsPerBlock(N, N);

MatAdd<<<numBlocks, threadsPerBlock>>>(A, B, C);

}

There is a limit to the number of threads per block, since all threads of a block are

expected to reside on the same processor core and must share the limited memory

resources of that core. On current GPUs, a thread block may contain up to 1024

threads.

However, a kernel can be executed by multiple equally-shaped thread blocks, so that

the total number of threads is equal to the number of threads per block times the

number of blocks.

Blocks are organized into a one-dimensional, two-dimensional, or three-dimensional

grid of thread blocks as illustrated by Figure 2-1. The number of thread blocks in a

grid is usually dictated by the size of the data being processed or the number of

processors in the system, which it can greatly exceed.

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