STM32F078CB/STM32F078RB/STM32F078VB：全面生产ARM微控制器数据手册

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STM32F078CB/STM32F078RB/STM32F078VB是一款基于Arm架构的32位微控制器，适用于广泛应用领域。该系列MCU的核心是Cortex-M0处理器，工作频率最高可达48MHz，提供了强大的计算性能。它具有128KB Flash内存用于存储程序代码，以及16KB的SRAM，其中包括硬件奇偶校验功能，支持数据的高效处理和存储。核心特性包括内置的CRC（循环冗余校验）单元，这有助于确保数据传输的准确性。在供电管理方面，该设备支持低功耗模式，如睡眠和停机模式，以节省电能，同时也具备宽范围的电源输入：数字和I/O供电VDD为1.8V±8%，模拟供电VDDA可以扩展至3.6V。部分I/O引脚支持低电压VDDIO2，可达到1.65V到3.6V，增强了设备的兼容性。时钟管理模块是设计的关键部分，集成有4到32MHz的晶体振荡器，以及32kHz用于RTC（实时时钟）的精确振荡器。内部还有8MHz RC振荡器，可选6倍 PLL（锁相环路倍频器），确保了稳定的时间基准。另外，还有一个48MHz的内部振荡器，通过外部同步实现自动频率校准，提高了精度。在I/O接口方面，STM32F078CB/STM32F078RB/STM32F078VB拥有高达86个高速I/O引脚，所有这些引脚均可映射到外部中断向量，增强外部事件处理能力。其中有67个I/O引脚具有5V耐受特性，另外还有19个可以在独立供电VDDIO2下工作的引脚，提供了灵活的信号处理选项。此外，该设备集成了一个12位、1.0us分辨率的ADC，最多支持16个通道，可测量0到3.6V的电压范围，这对于需要高精度模拟信号采集的应用来说非常有用。它还包含一个1.0us分辨率的12位DAC（数字模拟转换器），支持多种信号转换需求。总结来说，STM32F078CB/STM32F078RB/STM32F078VB凭借其高性能、低功耗、丰富的外设资源和广泛的供电选择，是一款适用于工业控制、嵌入式系统和物联网应用的理想微控制器。用户可以根据具体项目需求选择最适合的版本，充分利用其强大的功能特性来构建高效且稳定的解决方案。

Functional overview STM32F078CB, STM32F078RB, STM32F078VB

16/125 DS10212 Rev 6

Figure 2. Clock tree

3.7 General-purpose inputs/outputs (GPIOs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the

GPIO pins are shared with digital or analog alternate functions.

MSv31418V2

OSC_IN

OSC_OUT

OSC32_IN

OSC32_OUT

IWDG

PLLMUL

MCO

Main clock

output

PLLCLK

HSI

HSE

PLLCLK

ADC

asynchronous

clock input

LSE

LSI

HSI

HSE

RTC

PLLSRC

MCO

RTCCLK

RTCSEL

SYSCLK

TIM1,2,3,6,7,

14,15,16,17

FLITFCLK

Flash memory

programming

interface

HSI14

LSE

I2C1

USART1

LSE

HSI

SYSCLK

PCLK

SYSCLK

HSI

PCLK

I2S1/SPI1

I2S2/SPI2

CEC

APB

peripherals

LSI

LSE

PREDIV

HSI48

PLLNODIV

MCOPRE

TIM14

LSE

HSE

SYNC

CSS

Trim

Legend

white

clock tree control element

clock line

control line

black

clock tree element

/32

4-32 MHz

HSE OSC

/1,/2,/4,

/8,/16

/1,/2

14 MHz RC

HSI14

/1,/2,…

…/512

8 MHz

HSI RC

/1,/2,..

../16

32.768 kHz

LSE OSC

40 kHz

LSI RC

PLL

x2,x3,..

...x16

48 MHz

HSI RC

x1, x2

/1,/2,/4,..

../128

USARTxSW

PPRE

PPREHPRE

CECSW

/244

I2C1SW

SYSCLK

CRS

HSI

HSI48

HSI

SYNCSRC

USART2

HCLK

AHB, core, memory, DMA,

Cortex FCLK free-run clock

Cortex

system timer

USB

HSI48

USBSW

LSE

USB SOF

DS10212 Rev 6 17/125

STM32F078CB, STM32F078RB, STM32F078VB Functional overview

The I/O configuration can be locked if needed following a specific sequence in order to

avoid spurious writing to the I/Os registers.

3.8 Direct memory access controller (DMA)

The 7-channel general-purpose DMAs manage memory-to-memory, peripheral-to-memory

and memory-to-peripheral transfers.

The DMA supports circular buffer management, removing the need for user code

intervention when the controller reaches the end of the buffer.

Each channel is connected to dedicated hardware DMA requests, with support for software

trigger on each channel. Configuration is made by software and transfer sizes between

source and destination are independent.

DMA can be used with the main peripherals: SPIx, I2Sx, I2Cx, USARTx, all TIMx timers

(except TIM14), DAC and ADC.

3.9 Interrupts and events

3.9.1 Nested vectored interrupt controller (NVIC)

The STM32F0xx family embeds a nested vectored interrupt controller able to handle up to

32 maskable interrupt channels (not including the 16 interrupt lines of Cortex

-M0) and 4

priority levels.

• Closely coupled NVIC gives low latency interrupt processing

• Interrupt entry vector table address passed directly to the core

• Closely coupled NVIC core interface

• Allows early processing of interrupts

• Processing of late arriving higher priority interrupts

• Support for tail-chaining

• Processor state automatically saved

• Interrupt entry restored on interrupt exit with no instruction overhead

This hardware block provides flexible interrupt management features with minimal interrupt

latency.

3.9.2 Extended interrupt/event controller (EXTI)

The extended interrupt/event controller consists of 32 edge detector lines used to generate

interrupt/event requests and wake-up the system. Each line can be independently

configured to select the trigger event (rising edge, falling edge, both) and can be masked

independently. A pending register maintains the status of the interrupt requests. The EXTI

can detect an external line with a pulse width shorter than the internal clock period. Up to 86

GPIOs can be connected to the 16 external interrupt lines.

3.10 Analog-to-digital converter (ADC)

The 12-bit analog-to-digital converter has up to 16 external and 3 internal (temperature

Functional overview STM32F078CB, STM32F078RB, STM32F078VB

18/125 DS10212 Rev 6

sensor, voltage reference, VBAT voltage measurement) channels and performs conversions

in single-shot or scan modes. In scan mode, automatic conversion is performed on a

selected group of analog inputs.

The ADC can be served by the DMA controller.

An analog watchdog feature allows very precise monitoring of the converted voltage of one,

some or all selected channels. An interrupt is generated when the converted voltage is

outside the programmed thresholds.

3.10.1 Temperature sensor

The temperature sensor (TS) generates a voltage V

SENSE

that varies linearly with

temperature.

The temperature sensor is internally connected to the ADC_IN16 input channel which is

used to convert the sensor output voltage into a digital value.

The sensor provides good linearity but it has to be calibrated to obtain good overall

accuracy of the temperature measurement. As the offset of the temperature sensor varies

from chip to chip due to process variation, the uncalibrated internal temperature sensor is

suitable for applications that detect temperature changes only.

To improve the accuracy of the temperature sensor measurement, each device is

individually factory-calibrated by ST. The temperature sensor factory calibration data are

stored by ST in the system memory area, accessible in read-only mode.

3.10.2 Internal voltage reference (V

REFINT

)

The internal voltage reference (V

REFINT

) provides a stable (bandgap) voltage output for the

ADC and comparators. V

REFINT

is internally connected to the ADC_IN17 input channel. The

precise voltage of V

REFINT

is individually measured for each part by ST during production

test and stored in the system memory area. It is accessible in read-only mode.

Table 2. Temperature sensor calibration values

Calibration value name Description Memory address

TS_CAL1

TS ADC raw data acquired at a

temperature of 30 °C (± 5 °C),

DDA

= 3.3 V (± 10 mV)

0x1FFF F7B8 - 0x1FFF F7B9

TS_CAL2

TS ADC raw data acquired at a

temperature of 110 °C (± 5 °C),

DDA

= 3.3 V (± 10 mV)

0x1FFF F7C2 - 0x1FFF F7C3

Table 3. Internal voltage reference calibration values

Calibration value name Description Memory address

VREFINT_CAL

Raw data acquired at a

temperature of 30 °C (± 5 °C),

DDA

= 3.3 V (± 10 mV)

0x1FFF F7BA - 0x1FFF F7BB

DS10212 Rev 6 19/125

STM32F078CB, STM32F078RB, STM32F078VB Functional overview

3.10.3 V

BAT

battery voltage monitoring

This embedded hardware feature allows the application to measure the V

BAT

battery voltage

using the internal ADC channel ADC_IN18. As the V

BAT

voltage may be higher than V

DDA

and thus outside the ADC input range, the V

BAT

pin is internally connected to a bridge

divider by 2. As a consequence, the converted digital value is half the V

BAT

voltage.

3.11 Digital-to-analog converter (DAC)

The two 12-bit buffered DAC channels can be used to convert digital signals into analog

voltage signal outputs. The chosen design structure is composed of integrated resistor

strings and an amplifier in non-inverting configuration.

This digital Interface supports the following features:

• 8-bit or 12-bit monotonic output

• Left or right data alignment in 12-bit mode

• Synchronized update capability

• Noise-wave generation

• Triangular-wave generation

• Dual DAC channel independent or simultaneous conversions

• DMA capability for each channel

• External triggers for conversion

Six DAC trigger inputs are used in the device. The DAC is triggered through the timer trigger

outputs and the DAC interface is generating its own DMA requests.

3.12 Comparators (COMP)

The device embeds two fast rail-to-rail low-power comparators with programmable

reference voltage (internal or external), hysteresis and speed (low speed for low power) and

with selectable output polarity.

The reference voltage can be one of the following:

• External I/O

• DAC output pins

• Internal reference voltage or submultiple (1/4, 1/2, 3/4). Refer to Table 25: Embedded

internal reference voltage for the value and precision of the internal reference voltage.

Both comparators can wake up from STOP mode, generate interrupts and breaks for the

timers and can be also combined into a window comparator.

3.13 Touch sensing controller (TSC)

The STM32F078CB/RB/VB devices provide a simple solution for adding capacitive sensing

functionality to any application. These devices offer up to 23 capacitive sensing channels

distributed over 8 analog I/O groups.

Capacitive sensing technology is able to detect the presence of a finger near a sensor which

is protected from direct touch by a dielectric (glass, plastic...). The capacitive variation

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