TSMC 0.18µm Process 1.8-Volt SAGE-X Standard Cell Library Databook
16
Introduction
Figure 5. Minimum Pulse Width
Minimum pulse width is defined to be 0.50ns for all set/reset pins (SN, RN) and
0.18ns for all clock pins (G, GN, CK, CKN). These are the largest minimum
pulse widths measured from all the cells in the library. An input pulse of shorter
duration will produce unpredictable results.
Power Dissipation
The SAGE-X Standard Cell Library is designed to dissipate only AC power,
except for the small reverse-bias leakage currents which are normally present in
all CMOS circuits.
The power dissipation internal to a cell when a given input switches is primarily
dependent upon the cell design itself. The power dissipation of a complete
design, or part of a design, using cells from the SAGE-X Library is primarily a
function of the switching frequency of the design’s internal nets. These nets
include the inputs and outputs of each cell and the capacitive load associated
with the outputs of each cell.
The SAGE-X Library datasheets contain both an AC power table which
documents the internal energy consumption of each cell and a pin capacitance
table which gives input-pin capacitance data used to compute output loading.
This information, coupled with design-specific information, can be used to
estimate the total power dissipation of a cell within a design.
The AC power tables specify the amount of energy consumed within a cell (µW/
MHz)when thecorresponding pinchanges state at25
o
C, V,and typicalprocess.
The energy data in the tables were measured for an input slew of 0.03ns and no
loading at the outputs.
For combinatorial cells, energy values are provided for only input pins. The
energy value for each input pin is the average of energies associated with the
input transitions which result in an output transition.
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Signal
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