6.1 Switch-mode Regulator ....................................................................................................................... 26
6.2 Low-voltage VDD_DIG Linear Regulator ............................................................................................. 26
6.3 Reset ................................................................................................................................................... 26
6.3.1 Digital Pin States on Reset .................................................................................................... 27
6.3.2 Power-on Reset ..................................................................................................................... 27
7 Example Application Schematic ................................................................................................................... 28
8 Electrical Characteristics .............................................................................................................................. 29
8.1 Absolute Maximum Ratings ................................................................................................................. 29
8.2 Recommended Operating Conditions .................................................................................................. 29
8.3 Input/Output Terminal Characteristics ................................................................................................. 30
8.3.1 Switch-mode Regulator .......................................................................................................... 30
8.3.2 Low-voltage Linear Regulator ................................................................................................ 31
8.3.3 Digital Terminals .................................................................................................................... 31
8.3.4 AIO ......................................................................................................................................... 32
8.4 ESD Protection .................................................................................................................................... 32
9 Current Consumption .................................................................................................................................... 33
10 CSR Green Semiconductor Products and RoHS Compliance ..................................................................... 34
11 CSR1010 QFN Software Stack .................................................................................................................... 35
12 Tape and Reel Information ........................................................................................................................... 36
12.1 Tape Orientation .................................................................................................................................. 36
12.2 Tape Dimensions ................................................................................................................................. 37
12.3 Reel Information .................................................................................................................................. 38
12.4 Moisture Sensitivity Level .................................................................................................................... 38
13 Document References .................................................................................................................................. 39
Terms and Definitions ............................................................................................................................................ 40
List of Figures
Figure 1.1 Pinout Diagram ............................................................................................................................... 10
Figure 3.1 Clock Architecture ........................................................................................................................... 17
Figure 3.2 Crystal Driver Circuit ....................................................................................................................... 17
Figure 3.3 Sleep Clock Crystal Driver Circuit ................................................................................................... 19
Figure 4.1 Baseband Digits Block Diagram ...................................................................................................... 20
Figure 5.1 Example of an I²C Interface EEPROM Connection ......................................................................... 23
Figure 5.2 Memory Boot-up Sequence ............................................................................................................ 24
Figure 6.1 Voltage Regulator Configuration ..................................................................................................... 26
Figure 11.1 Software Architecture ...................................................................................................................... 35
Figure 12.1 Tape Orientation ............................................................................................................................. 36
Figure 12.2 Tape Dimensions ............................................................................................................................ 37
Figure 12.3 Reel Dimensions ............................................................................................................................. 38
List of Tables
Table 3.1 Crystal Specification ......................................................................................................................... 18
Table 3.2 Sleep Clock Specification ................................................................................................................. 19
Table 4.1 Wake Options for Sleep Modes ........................................................................................................ 21
Table 5.1 Possible UART Settings ................................................................................................................... 22
Production Information
© Cambridge Silicon Radio Limited 2012
This material is subject to CSR's non-disclosure agreement
Page 8 of 42
CS-231985-DSP3
www.csr.com
CSR1010 QFN
Data Sheet
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