5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H
:
Enable(DEFAULT)
L
:
Disable
DSWODVREN - On Die DSW VR Enable
*
Note: SUSACK# and SUSWARN# can be tied together if
EC does not want to involve in the handshake mechanism
for the Deep Sleep state entry and exit
CAN be NC ,if not support Deep Sx
DPWROK: Tired toghter with RSMRST#
that do not support Deep Sx
ELPIDA EDJ4216EFBG-GN-F
0
ELPIDA EDJ8416E6MB-GN-F
0
1
0
0 MICRON MT41K256M16HA-125:E
RAM_ID1 RAM_ID0
RAM P/N
0 1
1 1
SAMSUNG K4B4G1646Q-HYK0
HYNIX H5TC4G63AFR-PBA
0
RAM_ID2
0
0
0
0
0
0
0
1
1
0
1
0
1
0
1
1
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
0
0 0
SAMSUNG K4B8G1646Q-MYK0
0
MICRON MT41K512M16TNA-125:E
0 0
TBD1
GPIO59
1
1
GPIO58
1
GPIO57 GPIO56
11
1
1
1 1
1
1
1
0 0
0 1
RAM_ID3
TBD
TBD
TBD
TBD
TBD
TBD
HYNIX H5TC8G63AMR-PBA
1: Intel ME TLS with confidentiality
GPIO15 : TLS Confidentiality
0: Intel ME TLS with no confidentiality
*
(Have internal PD)
GSPI0_MOSI / GPIO86 : Boot BIOS Strap
1: LPC BUS
(Have internal PD)
*
0: SPI BUS
SDIO_D0 / GPIO66 : Top-Block Swap Override
0: DISABLED
1: ENABLED
*
(Have internal PD)
DPWROK can be tied to RSMRST# for platforms
that do not support the Deep Sx state.
10K,3VS
@10K,3VS XDP
10K,+3VALW_PCH
10K,+3VALW_PCH
@10K,+3VALW_PCH
@10K,+3VALW_PCH
10K,3VS
1K,+3VALW_PCH
10K,3VS
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,3VS
10K,3VS
@1K,+3VALW_PCH
10K,3VS
10K,3VS
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,3VS
10K,3VS
10K,3VS
10K,+3VALW_PCH10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,3VS
10K,3VS@10K,3VS
10K,3VS
@10K,3VS
10K,3VS
10K,3VS
10K,3VS
10K,3VS
10K,3VS
10K,3VS
10K,3VS
10K,3VS
DDR_ID
PU 10K to +3VALW_PCH (DDR3L)
PU down 10K (LP-DDR3)
ESD
ESD
ESD
ESD
ESD
06/30, RC130~RC133 change value to 2.2K ohm
MT41K256M16LY-107
07/07, change to mount
08/21, change to unpop
08/21, change to unpop
08/21, change to unpop
08/21, change to unpop
08/21, change to unpop
08/18, change to mount
H_PLT_RST#
PM_SLP_S5#
SYS_PWROK
SUSACK#_R
SYS_RESET#
APWROK_R
PCH_PWROK
EC_RSMRST#
PCH_GPIO30
PBTN_OUT#
AC_PRESENT
PCH_GPIO72
DSWODVREN
DPWROK
PCH_PCIE_WAKE#
H_PLT_RST#
SLP_S0_N
PCH_GPIO29
AC_PRESENT
PCH_GPIO32
PCH_GPIO61
PM_SLP_S3#
PM_SLP_A#
PM_SLP_S4#
SLP_LAN_N
SLP_SUS_N
PCH_GPIO76
PCH_GPIO24
PCH_GPIO49
PCH_GPIO13
PCH_GPIO25
SENSOR_HUB_RST#
RAM_ID2
RAM_ID0
RAM_ID3
RAM_ID1
PCH_GPIO8
PCH_GPIO48
PCH_GPIO12
PCH_GPIO15
SPKR
EC_SCI#
SENSOR_HUB_INT#_R
PCH_GPIO27
PCH_GPIO28
PCH_GPIO26
PCH_GPIO17
PCH_GPIO16
PCH_GPIO9
PCH_GPIO10
PCH_GPIO71
H_THERMTRIP#
SERIRQ
PCH_OPIRCOMP
PCH_GPIO32
EC_SCI#
PCH_GPIO33
SERIRQ
KB_RST#
PCH_GPIO48
PCH_GPIO65
PCH_GPIO67
PCH_GPIO71
PCH_GPIO16
PCH_GPIO61
PCH_GPIO13
PCH_GPIO30
PCH_GPIO9
PCH_GPIO10
PCH_GPIO72
RAM_ID2RAM_ID3 RAM_ID1 RAM_ID0
PCH_GPIO15
PCH_GPIO86
EC_RSMRST#
PCH_GPIO83
PCH_GPIO87
PCH_GPIO86
PCH_GPIO65
PCH_GPIO66
PCH_GPIO67
I2C1_SDA_TP
I2C1_SCL_TP
I2C0_SDA_SEN
I2C0_SCL_SEN
I2C0_SDA_SEN
I2C0_SCL_SEN
I2C1_SDA_TP
I2C1_SCL_TP
PCH_GPIO38
PCH_GPIO17
PCH_PCIE_WAKE#
PCH_GPIO76
PCH_GPIO8
PCH_GPIO12
PCH_GPIO28
PCH_GPIO49
PCH_GPIO50
PCH_GPIO25
SENSOR_HUB_RST#
SPKR
PCH_GPIO83
PCH_GPIO33
PCH_GPIO38
PCH_GPIO66
PCH_GPIO84
PCH_GPIO85
PCH_GPIO88
PCH_GPIO89
PCH_GPIO90
PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94
PCH_GPIO0
PCH_GPIO1
PCH_GPIO2
PCH_GPIO3
PCH_GPIO84
PCH_GPIO85
PCH_GPIO89
PCH_GPIO90
PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94
PCH_GPIO1
PCH_GPIO0
PCH_GPIO3
PCH_GPIO2
PCH_GPIO64
PCH_GPIO68
PCH_GPIO69
PCH_GPIO68
PCH_GPIO69
PCH_GPIO64
SENSOR_HUB_INT#_R
PCH_GPIO27
PCH_GPIO44
PCH_GPIO29
PCH_GPIO44
DDR_ID
PCH_GPIO50
PCH_GPIO45
PCH_GPIO45
PCH_GPIO70
PCH_GPIO70
DDR_ID
H_PLT_RST#
PCH_PWROK
H_THERMTRIP#
EC_RSMRST#
SYS_RESET#
PCH_GPIO87
SYS_RESET#
PCH_GPIO26
PCH_GPIO24
EC_RSMRST#[17]
PM_SLP_S5# [17]
SYS_PWROK[17,4]
PCH_PWROK[17]
PBTN_OUT#[17]
AC_PRESENT[17]
SUSCLK_WLAN [19]
PLT_RST# [17,19]
PM_SLP_S3# [17]
PM_SLP_S4# [17]
SPKR[15]
EC_SCI#[17]
NGFF_SSD_PRESENT#[18]
SERIRQ [17]
KB_RST# [17]
PCIECLKREQ2_N [6]
WLAN_CLKREQ# [19,6]
PCH_GPIO54 [4]
PCH_GPIO37 [6]
PCH_GPIO51 [4]
PCH_GPIO78 [4]
PCIECLKREQ5_N [6]
PCIECLKREQ0_N [6]
PCH_GPIO36 [6]
PCIECLKREQ1_N [6]
PCIECLKREQ4_N [6]
PCH_GPIO53 [4]
PCH_SATALED# [6]
PCH_GPIO34 [6]
PCH_GPIO60 [7]
PCH_GPIO73 [7]
PCH_GPIO11 [7]
I2C0_SCL_SEN [16]
I2C0_SDA_SEN [16]
I2C1_SCL_TP [23]
I2C1_SDA_TP [23]
PCH_GPIO77 [4]
PCH_GPIO79 [4]
BT_OFF# [19,4]
SENSOR_HUB_INT#[16,4]
DEVSLP1[18]
PCH_GPIO52 [4]
SENSOR_HUB_RST#[16]
+RTCVCC
+3VS
+3VALW_PCH
+1.05VS_VTT
+3VS
+3VALW_PCH
+3VALW_PCH
+3VS
+3VALW_PCH
+3VALW_PCH+3VALW_PCH +3VALW_PCH +3VALW_PCH
+3VS
+3VALW_PCH
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-B921PR10
1.0
P08-BDW MCP(5/9) PM,GPIO,I2C
Custom
8 36Friday, October 17, 2014
2014/04/10 2017/04/10
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-B921PR10
1.0
P08-BDW MCP(5/9) PM,GPIO,I2C
Custom
8 36Friday, October 17, 2014
2014/04/10 2017/04/10
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-B921PR10
1.0
P08-BDW MCP(5/9) PM,GPIO,I2C
Custom
8 36Friday, October 17, 2014
2014/04/10 2017/04/10
Compal Electronics, Inc.
RP50 10K_8P4R_5%RP50 10K_8P4R_5%
1 8
2 7
3 6
4 5
T53T53
RC55 0_0402_5%RC55 0_0402_5%
1 2
RP63 10K_8P4R_5%@RP63 10K_8P4R_5%@
1 8
2 7
3 6
4 5
RC51
200K_0402_5%
RC51
200K_0402_5%
12
RC133 2.2K_0402_5%RC133 2.2K_0402_5%
1 2
RC65 10K_0402_5%RC65 10K_0402_5%
1 2
T52T52
RC111 1K_0402_1%RC111 1K_0402_1%
1 2
RC118
10K_0402_5%
X76@
RC118
10K_0402_5%
X76@
12
RP62 10K_8P4R_5%@RP62 10K_8P4R_5%@
1 8
2 7
3 6
4 5
RC60
1K_0402_1%
RC60
1K_0402_1%
12
RC53 0_0402_5%RC53 0_0402_5%
1 2
RC67 10K_0402_5%RC67 10K_0402_5%
1 2
RC116
10K_0402_5%
X76@
RC116
10K_0402_5%
X76@
12
RC110 1K_0402_1%@RC110 1K_0402_1%@
1 2
RP57 10K_8P4R_5%RP57 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC62 0_0402_5%@RC62 0_0402_5%@
1 2
RC56 330K_0402_5%@RC56 330K_0402_5%@
1 2
RC61
49.9_0402_1%
RC61
49.9_0402_1%
1 2
RC112
4.7K_0402_5%
@RC112
4.7K_0402_5%
@
1 2
RC59
100K_0402_5%
RC59
100K_0402_5%
12
RP52 10K_8P4R_5%@RP52 10K_8P4R_5%@
1 8
2 7
3 6
4 5
RC54 0_0402_5%RC54 0_0402_5%
1 2
RC123
10K_0402_5%
X76@
RC123
10K_0402_5%
X76@
12
CC97
100P_0402_50V8J
@ESD@
CC97
100P_0402_50V8J
@ESD@
12
RC120
10K_0402_5%
X76@
RC120
10K_0402_5%
X76@
12
RC131 2.2K_0402_5%RC131 2.2K_0402_5%
1 2
RP54 10K_8P4R_5%RP54 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC147 10K_0402_5%RC147 10K_0402_5%
1 2
RC113 1K_0402_1%@RC113 1K_0402_1%@
12
CC96
1000P_0402_50V7K
ESD@
CC96
1000P_0402_50V7K
ESD@
1
2
RC64 10K_0402_5%RC64 10K_0402_5%
1 2
RC119
10K_0402_5%
X76@
RC119
10K_0402_5%
X76@
12
System Power Management
8 OF 20
UCPU1H
B
DW-Y-LPDDR3_BGA1234
@
System Power Management
8 OF 20
UCPU1H
B
DW-Y-LPDDR3_BGA1234
@
SUSACK
D19
SYS_RESET
E26
SYS_PWROK
A22
PCH_PWROK
F9
APWROK
J22
PLTRST
M23
RSMRST
F7
SUSWARN_N_SUSPWRDNACK_GPIO30
D8
PWRBTN
M21
ACPRESENT_GPIO31
M17
BATLOW_N_GPIO72
H17
SLP_S0
G22
SLP_WLAN_N_GPIO29
J18
DSWVRMEN
G14
DPWROK
J7
WAKE
F19
GPIO32_CLKRUN
B35
SUS_STAT_N_GPIO61
D25
SUSCLK_GPIO62
B27
SLP_S5_N_GPIO63
A18
SLP_S4
H19
SLP_S3
N22
SLP_A
G18
SLP_SUS
D27
SLP_LAN
K19
CPU/MISC
LPIO
GPIO
10 OF 20
UCPU1J
BDW-Y-LPDDR3_BGA1234
@
CPU/MISC
LPIO
GPIO
10 OF 20
UCPU1J
BDW-Y-LPDDR3_BGA1234
@
BMBUSY_N_USB3PHY_PC_GPIO76
J30
GPIO8
C18
LAN_PHY_PWR_CTRL_GPIO12
J14
GPIO15
K25
GPIO16
N26
GPIO17
H31
GPIO24
C22
GPIO27
K17
GPIO28
M25
GPIO26
B15
GPIO56
F25
GPIO57
F23
GPIO58
F15
GPIO59
D15
GPIO44
L18
GPIO47
B29
GPIO48
K29
GPIO49
B31
GPIO50
F33
HSIOPC_PCIEPHY_PC_GPIO71
D29
GPIO13
E14
GPIO14
M19
GPIO25
F17
GPIO45
P23
GPIO46
L22
GPIO9
D17
GPIO10
B17
DEVSLP0_GPIO33
E30
SDIO_POWER_EN_GPIO70
R36
DEVSLP1_GPIO38
K31
DEVSLP2_GPIO39
J41
SPKR_GPIO81
A34
THERMTRIP
CG40
RCIN_N_GPIO82
C34
SERIRQ
E34
PCH_OPI_RCOMP
AB4
RSVD_AJ14
AJ14
RSVD_AL18
AL18
GSPI0_CS_N__GPIO83
D40
GSPI0_CLK_GPIO84
G34
GSPI0_MISO_GPIO85
L36
GSPI0_MOSI_GPIO86
K33
GSPI1_CS_N_GPIO87
L34
GSPI1_CLK_GPIO88
M31
GSPI1_MISO_GPIO89
F37
GSPI_MOSI_GPIO90
H35
UART0_RXD_GPIO91
M35
UART0_TXD_GPIO92
F39
UART0_RTS_N_GPIO93
N43
UART0_CTS_N_GPIO94
N41
UART1_RXD_GPIO0
P29
UART1_TXD_GPIO1
H38
UART1_RST_N_GPIO2
N39
UART1_CTS_N_GPIO3
N30
I2C0_SDA_GPIO4
N36
I2C0_SCL_GPIO5
R42
I2C1_SDA_GPIO6
J37
I2C1_SCL_GPIO7
M33
SDIO_CLK_GPIO64
N34
SDIO_CMD_GPIO65
H40
SDIO_D0_GPIO66
R40
SDIO_D1_GPIO67
R38
SDIO_D2_GPIO68
J39
SDIO_D3_GPIO69
P31
RP51 10K_8P4R_5%RP51 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC57 10K_0402_5%RC57 10K_0402_5%
1 2
UC3
MC74VHC1G08DFT2G_SC70-5
@
UC3
MC74VHC1G08DFT2G_SC70-5
@
B
2
A
1
Y
4
P
5
G
3
RP59 10K_8P4R_5%RP59 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP65 10K_8P4R_5%RP65 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC148 10K_0402_5%@RC148 10K_0402_5%@
1 2
RC130 2.2K_0402_5%RC130 2.2K_0402_5%
1 2
RP49 10K_8P4R_5%@ RP49 10K_8P4R_5%@
1 8
2 7
3 6
4 5
RP46 10K_8P4R_5%RP46 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC146 10K_0402_5%RC146 10K_0402_5%
1 2
RC121
10K_0402_5%
X76@
RC121
10K_0402_5%
X76@
12
RP61 10K_8P4R_5%@RP61 10K_8P4R_5%@
1 8
2 7
3 6
4 5
RP45 10K_8P4R_5%RP45 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP55 10K_8P4R_5%@ RP55 10K_8P4R_5%@
1 8
2 7
3 6
4 5
T58T58
RC117
10K_0402_5%
X76@
RC117
10K_0402_5%
X76@
12
T59T59
CC93
100P_0402_50V8J
ESD@
CC93
100P_0402_50V8J
ESD@
12
RP47 10K_8P4R_5%RP47 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC132 2.2K_0402_5%RC132 2.2K_0402_5%
1 2
CC94
100P_0402_50V8J
@ESD@
CC94
100P_0402_50V8J
@ESD@
12
RC63 0_0402_5%RC63 0_0402_5%
1 2
CC95
100P_0402_50V8J
@ESD@
CC95
100P_0402_50V8J
@ESD@
12
RP64 10K_8P4R_5%@RP64 10K_8P4R_5%@
1 8
2 7
3 6
4 5
RC136 1K_0402_5%RC136 1K_0402_5%
1 2
T54T54
RP48 10K_8P4R_5%RP48 10K_8P4R_5%
1 8
2 7
3 6
4 5
RC137 1K_0402_5%@RC137 1K_0402_5%@
1 2
RP58 10K_8P4R_5%@RP58 10K_8P4R_5%@
1 8
2 7
3 6
4 5
T55T55
RC138 0_0402_5%@RC138 0_0402_5%@
1 2
RC122
10K_0402_5%
X76@
RC122
10K_0402_5%
X76@
12
RC52 330K_0402_5%RC52 330K_0402_5%
1 2