![](https://csdnimg.cn/release/download_crawler_static/15712683/bg3.jpg)
that a task can be executed in parallel, Lee introduced an
energy-saving scheduling scheme that turns off rarely used
cores [33]. In [37], Qi and Zhu studied energy efficiency for
different partitioning of cores to VFIs and proposed an
asymmetric buddy VFI configuration that can effectively
support various workload with great energy savings.
For real-time tasks that access nonpreemptable shared
resources, several resource access protocols have been
studied for uniprocessor real-time systems, such as
Priority Ceiling Protocol (PCP) [42] and Stack Resource
Policy (SRP) [8]. The protocols have been extended for
multiprocess or systems, s uch as Multiprocessor PCP
(MPCP) [32], and Multiprocessor SRP (MSRP) [23]. More
recently, Block et al. introduced a Flexible Multiprocessor
Locking Protocol (FMLP) [10] and Brandenburg and
Anderson studied suspension-based optimal locking pro-
tocols (namely, OMLP) [12].
Based on the resource access protocols, a few studies have
focused on energy management with task synchronization
for uniprocessor systems. Jejurikar and Gupta studied a
static Uniform Slowdown with Frequency Inheritance (USFI)
scheme, where a job inherits the maximum frequency of its
blocked jobs when it executes a critical section [29]. With
intuition that executing low priority tasks at a higher speed
can be more effective to reduce the blocking time between
tasks, Chen et al. studied two static frequency assignment
algorithms for uniprocessor systems with task synchroniza-
tion to obtain better energy savings [17]. However, both
studies did not consider dynamic energy management.
In [46], Zhang and Chanson proposed a Dual-Speed (DS)
algorithm for uniprocessor systems, where two (i.e., high
and low) speeds are calculated offline for each task to
satisfy the feasibility condition under the worst case
scenarios. At runtime, when no job is blocked, the low
speed with slack reclamation is applied for energy savings.
However, when blocking occurs, the high speed is needed
to guarantee deadlines of blocked tasks. Different from all
existing work that has focused on uniprocessor systems, in
this paper, we focus on VFI-based multicore real-time
systems with shared resources and study both static and
dynamic synchronization-aware schemes for periodic tasks,
which exploit spare system utilization and dynamic slack,
respectively, for energy savings.
3PRELIMINARIES
3.1 System and Power Models
We consider a real-time system with a multicore processor
that has M identical processing cores fO
1
; ...; O
M
g. The
cores are organized into V groups fG
1
; ...; G
V
g, where each
group has the same
1
number of cores that are on a voltage
and frequency island. That is, we assume that M is a multiple
of V and the number of cores on each VFI is M=V.
Moreover, each VFI is assumed to have a DVFS-enabled
voltage supply that can provide D discrete supply voltages v
i
and corresponding highest processing frequencies
f
i
ð1 i DÞ. The cores on a VFI share the common DVFS-
enabled voltage supply and thus have the same processing
frequency. However, considering that cores can be easily put
into power saving states [1], [2], each core is assumed to have
two states: active and sleep. When a core does not have
workload to process, it becomes inactive and is put to the
sleep state for energy savings. When all cores on a VFI are in
the sleep state, we can power off the VFI to save more energy.
For the widely used CMOS technology, dynamic power
dissipation is generally a dominant component, which is
quadratically related to supply voltage and linearly related
to processing frequency [13]. However, with scaled feature
size and increased level of integration, leakage power has
been ever-increasing and it has become a necessity for
effective energy management to consider both dynamic and
leakage power components [5], [15], [30]. In this work, we
adopt the power model
2
utilized in [41], where the power
consumption of a multicore system P
sys
can be given by
P
sys
¼
X
M
i¼1
h
i
P
dyn
ðfðO
i
ÞÞ þ P
leak
ðfðO
i
ÞÞ: ð1Þ
Here, h
i
indicates the state of core O
i
. When O
i
is active,
h
i
¼ 1; otherwise h
i
¼ 0. When core O
i
runs at frequency
fðO
i
Þ (and the corresponding voltage vðO
i
Þ), its dynamic
power consumption can be given as [13]:
P
dyn
ðfðO
i
ÞÞ ¼ C
ef
vðO
i
Þ
2
fðO
i
Þ: ð2Þ
The leakage power P
leak
ðfðO
i
ÞÞ, which exists even when
a core is put to sleep, can be given as [41]:
P
leak
ðfðO
i
ÞÞ ¼ L
g
ðvðO
i
ÞI
sub
þjV
bs
jI
k
Þ; ð3Þ
I
sub
¼ K
3
e
K
4
vðO
i
Þ
e
K
5
V
bs
; ð4Þ
where I
sub
and I
k
are leakage currents and V
bs
, L
g
, K
3
, K
4
,
and K
5
are system-dependent constants [41].
Note that energy is the integral of power over time. From
the above equations, we can see that, reducing processing
frequency of a core can lower the energy consumption due
to dynamic power while increasing the one due to leakage
power. Therefore, there exists a critical frequency f
crit
,
below which more energy may be consumed [5], [15], [30],
[37]. To simplify our discussion, we assume that the
minimum available frequency f
min
¼ f
1
f
crit
. Moreover,
assuming normalized frequencies, we have the maximum
frequency to be f
max
¼ f
D
¼ 1. In addition, the overhead
caused by voltage and frequency changes is assumed to be
negligible (or such overhead can be incorporated into slack
reclamation or the worst case execution time (WCET) of
tasks [48]).
3.2 Task and Resource Models
We consider a set of N periodic real-time tasks ¼
fT
1
; ...;T
N
g, where each task T
i
has a period p
i
that is also
its relative deadline. The jth task instance (or job) of task T
i
arrives at time ðj 1Þp
i
and has to complete by its absolute
deadline j p
i
. Since there is only one active job for each task
at any time, without causing ambiguity, we use task and job
exchangeably in this paper.
1684 IEEE TRANSACTIONS ON COMPUTERS, VOL. 61, NO. 12, DECEMBER 2012
1. Although it is possible to have heterogeneous VFIs that contain
different number of cores [37], such options can increase processor design
complexity.
2. Note that, similar power models have been adopted in other recent
work on power management [5], [15], [30].