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Rev. 0.5 7/10 Copyright © 2010 by Silicon Laboratories AN340
Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).
AN340
Si3217X PROSLIC
®
DESIGNER'S GUIDE
1. Introduction
The Si3217x is a family of pin-compatible single-channel ProSLIC products that implement a complete foreign
exchange station (FXS) telephony interface solution in one package in accordance with all relevant LSSGR, ITU
and ETSI specifications. Select parts in the product family also implement Silicon Laboratories’ patented capacitive
isolation technology to enable seamless connection to an Si3291x line-side integrated circuit to form a complete
foreign exchange office (FXO) solution.
The terms FXS and FXO are used throughout this document. The term “FXS” refers to the SLIC (Subscriber Line
Interface Circuit) functionality of the Si3217x, while the term “FXO” refers to the data access arrangement DAA
functionality of the Si32178 and Si3291x.
The FXS channel features an integrated dc-dc controller that supports tracking battery generation up to 136 V. A
VDC input typically in the range of +7 V
DC
to +20 V
DC
is required for the dc-dc converter. Other input voltage
ranges for the dc-dc converter are possible by selecting the appropriate converter BOM components.
The Si3217x ProSLIC integrated circuits operate from a +3.3 V digital supply and interface to standard SPI/PCM or
GCI digital interfaces. The Si3217x product family is available in a 5 x 7 mm 42-pin QFN package. The Si32911/19
line-side FXO devices are available in 16-pin SOIC packages.
Table 1 provides a summary of the Si3217x product family. The Si3291x line-side integrated circuits, which are
required to complete one FXO channel, are summarized in Table 2.
The Si3217x and Si32911/19 product family are designed to easily implement telephony systems comprising
1FXS, 2FXS, 1FXS/1FXO, 2FXS/1FXO and other possible combinations of FXS and FXO channels.
Table 3 Provides a summary of the differences between the Si32911 and Si32919 line-side devices.
Table 1. Si3217x Family of Devices
Si3217x
Part Number
Wideband
Mode
FXO
Interface
DTMF
Detection
Pulse
Metering
Max V
bat
Si32178 –110 V
Si32177 –136 V
Si32176 –110 V
Si32171 –110 V
Table 2. Si3291x Line-Side (FXO) Device Family
Si3291x
Part Number
Region Ringer
Thresholds
On-Hook
Speeds
Si32911 FCC/CTR21 1 2
Si32919 Global 3 3
AN340
2 Rev. 0.5
For the FXS, the audio path directions are defined from the perspective of a telephone that is connected to the FXS
channel, so that the TX path conveys the signal sent from the telephone towards the PCM/GCI bus, and the RX
path conveys the audio signal sent from the PCM/GCI bus towards the telephone. The PCM bus DTX output pin
and DRX input pins are also defined according to this FXS convention.
Since the FXO is connected at the CPE (Customer Premise Equipment) end of the wireline, its definition for TX and
RX audio paths are the same as for a telephone, with TX being the signal sent towards the CO (Central Office) and
RX being the signal received from the CO.
The PCM Bus DTX (output) and DRX (input) pins are shared by the FXS and FXO, and the FXS convention is
used for these two pins.
1.1. Si3217x and Si3291x Key Features
The key features of the Si3217x are summarized in the sections that follow.
1.1.1. Si3217x and Si3291x General Features
The following features apply to the Si3217x and/or Si3291x:
PCM and SPI bus digital interfaces with programmable interrupts
SPI daisy-chaining for up to 32 channels (5-bit SPI Channel ID)
GCI/IOM-2 mode support
Si3217x devices are available in a 42-pin QFN package
Si3291x devices are available in a 16-pin SOIC package
1.1.2. FXS Feature Summary
The FXS channel in all Si3217x devices features an integrated dc-dc converter controller that tracks the ac tip and
ring ringing waveforms in the ringing state or the dc voltages in the on-hook or off-hook states to provide optimal
power consumption and minimize high-voltage integrated circuit (HVIC) power dissipation.
The FXS channel in all Si3217x devices provide standard voiceband audio (200 Hz to 3.4 kHz) with 8-bit µ-Law or
A-Law companding or 16-bit linear sampling at 8 kHz.
The Si32178 (wideband) includes FXO support and is intended to be combined with the Si3291x FXO line-side
device to form a complete FXO channel in addition to the FXS channel.
The Si32176/Si32177 (FXS only) and Si32178 (FXS and FXO) provide software-selectable FXS audio operation,
featuring a wideband audio mode (50 Hz to 7 kHz) with 16-bit linear sampling at 16 kHz as well as the standard
voiceband audio mode (200 Hz to 3.4 kHz) with 8-bit µ-Law or A-Law companding or 16-bit linear sampling at
8kHz.
Table 3. Si32911 and Si32919 Differences
Country Compliance FXO
Control Bits
Register
(Decimal)
Si32911
Valid Settings
Si32919
Valid Settings
Feature
ACIM[3:0] 30 0000, 0010 X AC Impedances
OHS 16 0 X On-Hook Speed
RZ 16 0 X Ringer Impedance
RT 16 0 X Ringer Thresholds
SQ1, SQ0 59 00 X Spark Quenching
Note: ‘X’ indicates that all possible settings are supported. The Si32911 has restricted settings in REG 30, REG 16 and
REG 59, as shown above, and writing other values than those indicated has no effect. If the ACIM[3:0] field in REG 30
is written with values other than 0 or 2 while using the Si32911 line-side device, the FXO ignores the setting and
defaults to the 600 ac termination. Refer to the FXO register definitions for REG 30, REG 16 and REG 59 for further
details. See "4.8. FXO Control Registers" on page 366.
AN340
Rev. 0.5 3
The Si32171 (FXS only) features pulse metering and DTMF decoding. The Si32171 is targeted to the wireless local
loop (WLL) market, and supports pulse metering for the WLL pay phone environment.
FXS key features:
Performs all BORSCHT functions
Integrated dc-dc converter
Ideal for short/medium loop applications (VoCable, VoDSL, VoIP, WLL)
Narrowband (200 Hz to 3.4 kHz) Codec with 8-bit sampling at 8 kHz
Wideband (50 Hz to 7 kHz) Codec with 16-bit sampling at 16 kHz for enhanced audio quality (Si32176/7/8)
Internal balanced ringing
Internal unbalanced ringing
Low idle channel noise (8 dBrnC typ)
Software programmable parameters:
Ringing frequency, amplitude, cadence, and waveshape
Two-wire ac impedance
Transhybrid balance
Three-segment dc current loop feed
Power alarms
Balanced dc feeding arrangement
Uniform power dissipation in linefeed components
Balanced pulse dialing for low crosstalk
Balanced hook transitions
On-hook transmission
Loop or ground start operation
Loop closure and ring-trip thresholds
Ground key detect threshold
Smooth polarity reversal
High longitudinal current tolerance
DTMF decoder
Caller ID generators
Dual tone generators
A-Law/µ-Law companding, linear PCM
Audio diagnostics with loopback
GR-909 line testing
Enhanced loop testing architecture
Positive and negative fault voltage sensing
Sensing outside the protection circuit
Patents:
US Patent# 7,164,763
Other patents pending
AN340
4 Rev. 0.5
1.1.3. FXO Feature Summary
The Si32178 is designed to be combined with one of the two Si3291x line-side devices to provide a highly-
programmable and globally-compliant (Si32919) foreign exchange office (FXO) analog interface that is ideal for
DSL IADs, PBXs, IP-PBXs, and VoIP gateway products. The solution implements Silicon Laboratories' patented
isolation capacitor technology, which eliminates the need for costly isolation transformers, relays, or opto-isolators,
while providing superior surge immunity for robust field performance. The FXO sub-system requires minimal
external components. The Si32178 also features DTMF detection. The audio signal from the FXS or the FXO can
be routed to the DTMF decoder under software control. The Si32911 supports North America (FCC) and Europe
(CTR21), while the Si32919 provides a global FXO solution. Thus, the Si3291x line-side device should be selected
according to the target market.
FXO key features:
µ-law/A-law companding
80 dB dynamic range TX/RX
Line voltage monitor
Loop current monitor
+6 dBm TX/RX level mode (Si32911)
+3.2 dBm and +6 dBm TX/RX level mode (Si32919)
Parallel handset detection
3 µA on-hook line monitor current
Overload detection
Programmable line interface
AC termination
DC termination
Ring detect threshold
Ringer impedance
TIP/RING polarity detection
Integrated codec and 2- to 4-wire analog hybrid
Programmable digital hybrid for near-end echo reduction
Polarity reversal detection
Programmable digital gain in 0.1 dB increments
Integrated ring detector
Type I and II caller ID support
Pulse dialing support
Greater than 5000 V isolation
Patented isolation technology
Loop-start operation
Available in Pb-free RoHS-compliant packages
Patents:
US Patent# 5,870,046
US Patent# 6,061,009
Other Patents Pending
AN340
Rev. 0.5 5
1.2. Document Structure
This document is a complete product reference for the Si3217x and Si3291x and complements the Si3217x
product data sheet. Refer to the Si3217x data sheet for product ordering information, electrical specifications,
performance specifications, packaging information, device pin-out and environmental information for the Si3217x
and Si3291x.
This document is organized into three major sections:
"2. Functional Description" on page 16.
"3. Hardware Guide" on page 175
"4. Software Guide" on page 197.
The Functional Description section provides detailed information on common circuits shared by the FXS and FXO
channels, as well as detailed functional information for the FXS and FXO channels. The various control/status
registers applicable to each function and the equations needed to calculate RAM coefficients for the FXS channel
to suit a particular application, are discussed in detail.
The Hardware Guide provides detailed information concerning system-level hardware design, including a
reference schematic, bill of materials (BOM), PCB layout guidelines and recommended protection circuitry.
The Software Guide describes the product software initialization procedures, calibration procedures, control/status
register definitions for both the FXS and FXO channels, RAM locations for the FXS channel, and FXS patch RAM
loading and verification procedures.
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