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Zynq UltraScale+ MPSoC
Software Developer Guide
UG1137 (v11.0) December 5, 2019

Revision History
The following table shows the revision history for this document.
Date Version Revision
12/05/2019 v11.0 • Updated to Vitis Embedded Flow from SDK.
06/26/2019 v10.0 • In Chapter 4:
°
Updated Table 4-3.
•In Chapter 7:
°
Updated Table 7-6 to Tab le 7 -17.
•In Chapter 10:
°
Added the CSU/PMU Register Access section.
°
Updated Table 10-10.
•In Chapter 11:
°
Updated the Configuration Object section.
°
Updated the Power Management Initialization section.
•Updated Appendix A to Appendix K.
• Added a new library, Appendix L, XilMailbox Library v1.0.
01/18/2019 v9.0 • In Chapter 2:
°
Updated Boot Modes section.
°
Updated the System-Level Protections section with a reference to UG1085
•In Chapter 3:
°
Added Device Tree Generator section.
•In Chapter 4:
°
Removed XilRSA references.
•In Chapter 8:
°
Updated the Configuring XMPU Registers section.
•In Chapter 10
°
Updated PMU firmware Build Flags table with Efuse_Access and PM_LOG_LEVEL.
°
Power Management Frameworksection updated.
°
Restart Tracker Structure Members table updated.
°
PMU firmware Metrics table updated.
•In Chapter 12:
°
Warm Restart section updated with a note about on-chip memory (OCM).
•In Chapter 16:
°
Removed content and updated the chapter with a short description and added
a reference to the Bootgen user guide.
Send Feedback
Zynq UltraScale+ MPSoC: Software Developers Guide
UG1137 (v11.0) December 5, 2019 www.xilinx.com
2

06/22/2018 v8.0 • In Chapter 7:
°
Added a note that SHA-2 will be deprecated from 2019.1 release with a
recommendation to use SHA-3
•In Chapter 8:
°
Added Enhanced RSA Key Revocation Support
•In Chapter 10
°
Updated PMU firmware Signals PLL Lock Errors on PS_ERROR_OUT section and
PMU f
irmware Loading Options
05/04/2018 v7.0 • In Chapter 8:
°
Added Bif File for Obfuscated Form (Gray) key stored in eFUSE
°
Updated deprecation of SHA-2 authentication
•In Chapter 12:
°
Added Warm Restart section
•In Chapter 16:
°
Updated Boot Image format documentation
01/19/2018 v6.0 • In Chapter 5:
°
Added a note in Bare Metal Application Development section.
•In Chapter 7:
°
Updated Boot Flow section
°
Updated Boot Modes section
•In Chapter 8:
°
Updated BIF File with Multiple AESKEY Files section.
•In Chapter 13:
°
Updated Ethernet Flow figures.
•In Chapter 16:
°
Updated example for [fsbl_config] parameter
Send Feedback
Zynq UltraScale+ MPSoC: Software Developers Guide
UG1137 (v11.0) December 5, 2019 www.xilinx.com
3

11/15/2017 v5.0 • In Chapter 1:
°
Updated Prerequisites section.
•In Chapter 2:
°
Updated Boot Process section.
°
Updated Security section.
•In Chapter 4:
°
Updated FreeRTOS Software Stack section.
•In Chapter 7:
°
Added FSBL Build Process section.
°
Added Setting FSBL Compilation Flags section.
°
Updated Boot Modes section.
•In Chapter 8:
°
Updated Boot Time Security section.
•In Chapter 9:
°
Updated Platform Management in PS section.
°
Updated PMU firmware section.
• Added a new Chapter 10, Platform Management Unit Firmware.
•In Chapter 11:
°
Updated Zynq UltraScale+ MPSoC Power Management Software Architecture
section.
°
Updated Using the API for Power Management section.
°
Updated Configuration Object section.
°
Updated Power Management Initialization section.
°
Updated Using the API for Power Management section.
°
Updated XilPM Implementation Details section.
•In Chapter 16:
°
Updated BIF File Parameters section.
°
Updated Boot Image Format section.
°
Updated Boot Header Table.
•Updated Appendix A to Appendix K.
•Updated Appendix M, Additional Resources and Legal Notices.
Send Feedback
Zynq UltraScale+ MPSoC: Software Developers Guide
UG1137 (v11.0) December 5, 2019 www.xilinx.com
4

05/03/2017 v4.0 • In Chapter 2:
°
Added Boot Process.
•In Chapter 4:
°
Updated Figure 4-2.
°
Added information about Linux software stack exception levels EL0-EL3.
•In Chapter 5:
°
Updated Figure 5-1.
•In Chapter 7:
°
Moved Boot Flow here from Chapter 2.
°
Added QSPI24 and QSPI32 Boot Modes and eMMC18 Boot Mode.
°
Added more information to JTAG Boot Mode.
°
Added USB Boot Mode.
°
Updated Figure 7-5.
°
Added FSBL_USB_EXCLUDE to Table 7-3.
•In Chapter 8:
°
Removed figure showing flow diagram for secured booting.
°
Removed section on library support; this is now covered in Appendix G,
XilSecure Library v4.1.
°
Added examples to Encryption.
°
Added more information to Authentication.
°
Added Bitstream Authentication Using External Memory.
°
Added System Memory Management Unit.
°
Added A53 Memory Management Unit.
°
Added R5 Memory Protection Unit.
• Added Chapter 11, Power Management Framework.
•In Chapter 16:
°
Added parameters and descriptions in Table 16-1.
°
Added Boot Image Format.
°
Added additional bit descriptions in Table 16-9.
• Added Appendixes for OS & Libraries content (Appendixes A-K).
12/15/2016 v3.0 Added content to Introduction in Chapter 1.
Corrected text in Boot Modes in Chapter 7.
Changed link references to the Zynq UltraScale+ MPSoC Technical Reference Manual
(UG1085).
Corrected and added links to Appendix M, Additional Resources and Legal Notices.
Send Feedback
Zynq UltraScale+ MPSoC: Software Developers Guide
UG1137 (v11.0) December 5, 2019 www.xilinx.com
5
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