合工大计组实验五实验报告

计算机组成

实验报告

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实验五、单周期 CPU 设计与实

现——十条指令 CPU

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一、实验目的:.........................................................................................................................................3

二、实验内容:.........................................................................................................................................3

1．非访存指令........................................................................................................................................3

2．访存指令............................................................................................................................................3

3．转移类指令 .......................................................................................................................................3

三、实验原理............................................................................................................................................4

四、实验步骤............................................................................................................................................5

1 、CPU各模块 Verilog实现 ......................................................................................................... ...5

1) PC模块........................................................................................................................................... .....5

2)指令存储器模块 .................................................................................................................................6

3) 累加器.................................................................................................................................................7

4) ALU.....................................................................................................................................................8

5) 控制单元 ............................................................................................................................................9

6)数据存储器模块 .................................................................................................................................9

2、 CPU顶层文件封装实现 ...............................................................................................................11

3、 CPU模拟仿真 ...............................................................................................................................12

1）TestBench 关键代码 ....................................................................................................................12

2）ModelSim 仿真及分析 ..................................................................................................................13

五、总结..................................................................................................................................................20